JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지
DOI QR코드

DOI QR Code

Efficient Design and Performance Analysis of a Hardware Right-shift Binary Modular Inversion Algorithm in GF(p)

  • Received : 2016.10.06
  • Accepted : 2016.12.25
  • Published : 2017.06.30
Download PDF
⟨ Previous Next ⟩

Abstract

For efficient hardware (HW) implementation of elliptic curve cryptography (ECC), various sub-modules for the underlying finite field operations should be implemented efficiently. Among these sub-modules, modular inversion (MI) requires the most computation; therefore, its performance might be a dominant factor of the overall performance of an ECC module. To determine the most efficient MI algorithm for an HW ECC module, we implement various classes of MI algorithms and analyze their performance. In contrast to the common belief in previous research, our results show that the right-shift binary inversion (RS) algorithm performs well when implemented in hardware. In addition, we present optimization methods to reduce the area overhead and improve the speed of the RS algorithm. By applying these methods, we propose a new RS-variant that is both fast and compact. The proposed MI module is more than twice as fast as the other two classes of MI: shifting Euclidean (SE) and left-shift binary inversion (LS) algorithms. It consumes only 15% more area and even 5% less area than SE and LS, respectively. Finally, we show that how our new method can be applied to optimize an HW ECC module.

Keywords

References

  1. P. Choi, S. Lee, and D. K. Kim, "Design of efficient modular inversion module using resource sharing," Multimedia Information Technology and Applications, 2015, MITA 2015, 11th KMMS International Conference on, pp.298-299, Jun., 2015.
  2. P. Choi, J.-T. Kong, and D. K. Kim, "Analysis of hardware modular inversion modules for elliptic curve cryptography," International SoC Design Conference, 2015, ISOCC 2015, pp.313-314, Nov., 2015.
  3. E. Barker and A. Roginsky, "NIST Special Publication 800-131A Transitions: Recommendation for Transitioning the Use of Cryptographic Algorithms and Key Lengths," ed: NIST, 2011.
  4. T. Güneysu and C. Paar, "Ultra high performance ECC over NIST primes on commercial FPGAs," Cryptographic Hardware and Embedded Systems, 2008, CHES 2008, ed: Springer, pp.62-78, 2008.
  5. B. MuthuKumar and S. Jeevananthan, "High speed hardware implementation of an elliptic curve cryptography (ECC) co-processor," Trendz in Information Sciences & Computing, 2010, TISC 2010, pp.176-180, 2010.
  6. G. Chen, G. Bai, and H. Chen, "A dual-field elliptic curve cryptographic processor based on a systolic arithmetic unit," Circuits and Systems, 2008, ISCAS 2008, IEEE International Symposium on, pp.3298-3301, 2008.
  7. J.-Y. Lai and C.-T. Huang, "Elixir: High-throughput cost-effective dual-field processors and the design framework for elliptic curve cryptography," Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol.16, pp.1567-1580, 2008. https://doi.org/10.1109/TVLSI.2008.2001239
  8. J.-Y. Lai and C.-T. Huang, "A highly efficient cipher processor for dual-field elliptic curve cryptography," Circuits and Systems II: Express Briefs, IEEE Transactions on, Vol.56, pp. 394-398, 2009. https://doi.org/10.1109/TCSII.2009.2019327
  9. J.-Y. Lai and C.-T. Huang, "Energy-adaptive dual-field processor for high-performance elliptic curve cryptographic applications," Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol.19, pp.1512-1517, 2011. https://doi.org/10.1109/TVLSI.2010.2048134
  10. D. Hankerson, A. J. Menezes, and S. Vanstone, Guide to Elliptic Curve Cryptography: Springer Science & Business Media, 2006.
  11. P. Gallagher and C. Kerry, "Fips pub 186-4: Digital signature standard, dss," ed: NIST, 2013.
  12. N. Takagi, "A modular inversion hardware algorithm with a redundant binary representation," Information and Systems, IEICE Transactions on, Vol.76, pp.863-869, 1993.
  13. X. Yan and S. Li, "Modified modular inversion algorithm for VLSI implementation," 7th International Conference on ASIC, pp.90-93, 2007.
  14. C. Chen and Z. Qin, "Fast algorithm and hardware architecture for modular inversion in GF (p)," Intelligent Networks and Intelligent Systems, 2009, ICINIS 2009, 2nd International Conference on, pp.43-45, 2009.
  15. S. Ma, Y. Hao, Z. Pan, and H. Chen, "Fast implementation for modular inversion and scalar multiplication in the elliptic curve cryptography," Intelligent Information Technology Application, 2008, IITA 2008, 2nd International Symposium on, pp.488-492, 2008.
  16. R. Lorencz, "New algorithm for classical modular inverse," in Cryptographic Hardware and Embedded Systems, 2002, CHES 2002, ed: Springer, pp. 57-70, 2002.
  17. J. Hlavac and R. Lorencz, "Arithmetic unit for computations in GF (p) with the left-shifting multiplicative inverse algorithm," Architecture of Computing Systems, 2013, ARCS 2013, ed: Springer, pp.268-279, 2013.
  18. L. Hars, "Modular inverse algorithms without multiplications for cryptographic applications," Embedded Systems, EURASIP Journal on, Vol.2006, pp.1-13, 2006.
  19. D. Galbi and A. K. Chan, "Four-to-two adder cell for parallel multiplication," ed: Google Patents, 1990.