JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
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STT-MRAM Read-circuit with Improved Offset Cancellation

  • Lee, Dong-Gi (Dept. of Electronics and Computer Engineering, Hanyang University) ;
  • Park, Sang-Gyu (Dept. of Electronics and Computer Engineering, Hanyang University)
  • Received : 2016.05.11
  • Accepted : 2017.05.01
  • Published : 2017.06.30
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Abstract

We present a STT-MRAM read-circuit which mitigates the performance degradation caused by offsets from device mismatches. In the circuit, a single current source supplies read-current to both the data and the reference cells sequentially eliminating potential mismatches. Furthermore, an offset-free pre-amplification using a capacitor storing the mismatch information is employed to lessen the effect of the comparator offset. The proposed circuit was implemented using a 130-nm CMOS technology and Monte Carlo simulations of the circuit demonstrate its effectiveness in suppressing the effect of device mismatch.

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References

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