DOI QR코드

DOI QR Code

Dedication Load Based Dispatching Rule for Load Balancing of Photolithography Machines in Wafer FABs

반도체 생산 공정에서 포토장비의 부하 밸런싱을 위한 Dedication 부하 기반 디스패칭 룰

  • Received : 2016.02.03
  • Accepted : 2016.10.21
  • Published : 2017.03.01

Abstract

This research develops dispatching rule for a wafer FABs with dedication constraints. Dedication, mostly considered in a photolithography step, is a feature in a modern FABs in order to increase the yield of machines and achieve the advance of manufacturing technology. However, the dedication has the critical problem because it causes dedication load of machines to unbalance. In this paper, we proposes the dedication load based dispatching rule for load balancing in order to resolve the problem. The objective of this paper is to balance dedication load of photo machines in wafer FABs with dedication constraint. Simulation experiments show that the proposed rule improves the performance of wafer FABs as well as load balance for dedication machines compared to open-loop control based conventional dispatching rule.

Keywords

References

  1. Sarin, S.C., Varadarajan, A. and Wang, L., 2011, A Survey of Dispatching Rules for Operational Control in Wafer Fabrication, Production Planning & Control, 22(1), pp.4-24. https://doi.org/10.1080/09537287.2010.490014
  2. Chern, C.C. and Liu, Y.L., 2003, Family-based Scheduling Rules of a Sequence-dependent Wafer Fabrication System, IEEE Transaction on Semiconductor Manufacturing, 16(1), pp.15-25. https://doi.org/10.1109/TSM.2002.807742
  3. Shen, Y. and Leachman, R.C., 2003, Stochastic Wafer Fabrication Scheduling, IEEE Transaction on Semiconductor Manufacturing, 16(1), pp.2-14. https://doi.org/10.1109/TSM.2002.807743
  4. Zhou, M. and Jeng, M.D., 1998, Modeling, Analysis, Simulation, Scheduling, and Control of Semiconductor Manufacturing Systems: A Petri Net Approach, IEEE Transaction on Semiconductor Manufacturing, 11(3), pp.333-357. https://doi.org/10.1109/66.705370
  5. Miwa, T., Nishihara, N. and Yamamoto, K., 2005, Automated Stepper Load Balance Allocation System, IEEE Transaction on Semiconductor Manufacturing, 18(4), pp.510-516. https://doi.org/10.1109/TSM.2005.858472
  6. Arisha, A. and Young, P., 2004, Intelligent Simulation-based Lot Scheduling of Photolithography Toolsets in a Wafer Fabrication Facility, Proceedings of the 2004 Winter Simulation Conference.
  7. Monch, L., Prause, M. and Schmalfuss, V., 2001, Simulation-based Solution of Load Balancing Problems in the Photolithography Area of a Semiconductor Wafer Fabrication Facility, Proceedings of the 2004 Winter Simulation Conference.
  8. Elif, A. and Nemoto, K., 2001, Cycle-time Improvements for Photolithography Process in Semiconductor Manufacturing, IEEE Transaction on Semiconductor Manufacturing, 14(1), pp.48-56. https://doi.org/10.1109/66.909654
  9. Wu, M.C., Chiou, S.J. and Chen, C.F., 2008, Dispatching for Make-to-order Wafer Fabs with Machine-dedication and Mask Set-up Characteristics, International Journal of Production Research, 46(14), pp.3993-4009. https://doi.org/10.1080/00207540601085919
  10. Wu, M.C., Huang, Y.L., Chang, Y.C. and Yang, K.F., 2006, Dispatching in Semiconductor Fabs with Machine-dedication Features, International Journal of Advanced Manufacturing Technology, 28, pp.978-984. https://doi.org/10.1007/s00170-004-2431-x
  11. Morton, T.E. and Pentico, D.W., 1993, Heuristic Scheduling Systems, Wiley, New York, 720p.
  12. Glassey, C.R. and Resende, M.G.C., 1988, A Scheduling Rule for Job Release in Semiconductor Fabrication, Operations Research Letters, 7(5), pp.213-217. https://doi.org/10.1016/0167-6377(88)90033-8
  13. Neuts, M.F., 1967, A General Class of Bulk Service Queue with Poisson Input, The Annals of Mathematical Statistics, 38(3), pp.759-770. https://doi.org/10.1214/aoms/1177698869
  14. Shr, A.M.D., Liu, A. and Chen, P.P., 2008, Load Balancing among Photholithography Machines in the Semiconductor Manufacturing System, Journal of Information Science and Engineering, 24, pp.379-391.