반도체디스플레이기술학회지 (Journal of the Semiconductor & Display Technology)

한국반도체디스플레이기술학회 (The Korean Society Of Semiconductor & Display Technology)
권호 표지

조립형 박막 트랜지스터 모델링 프레임워크

Assembly Modeling Framework for Thin-Film Transistors

  • 정태호 (서울과학기술대학교 전자IT미디어 공학과)
  • Jung, Taeho (Department of Electronic and IT Media Engineering, Seoul National University of Science and Technology)
  • 투고 : 2017.09.01
  • 심사 : 2017.09.18
  • 발행 : 2017.09.30
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초록

As the demand on displays increases, new thin-film transistors such as metal oxide transistor are continuously being invented. When designing a circuit consisting of such new transistors, a new transistor model based on proper charge transport mechanisms is needed for each of them. In this paper, a modeling framework which enables to choose charge transport mechanisms that are limited to certain operation regions and assemble them into a transistor model instead of making an integrated transistor model dedicated to each transistor. The framework consists of a graphic user interface to choose charge transport models and a current calculation part, which is also implemented in AIM-SPICE for circuit simulation.

키워드

참고문헌

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