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Design of Parallel Processing of Lane Detection System Based on Multi-core Processor

멀티코어를 이용한 차선 검출 병렬화 시스템 설계

  • Lee, Hyo-Chan (Department of Information and Communication Engineering, Hoseo University) ;
  • Moon, Dai-Tchul (Department of Information and Communication Engineering, Hoseo University) ;
  • Park, In-hag (System Centroid Inc.) ;
  • Heo, Kang (Department of Information and Communication Engineering, Hoseo University)
  • Received : 2016.07.11
  • Accepted : 2016.07.17
  • Published : 2016.09.30

Abstract

we improved the performance by parallelizing lane detection algorithms. Lane detection, as a intellectual assisting system, helps drivers make an alarm sound or revise the handle in response of lane departure. Four kinds of algorithms are implemented in order as following, Gaussian filtering algorithm so as to remove the interferences, gray conversion algorithm to simplify images, sobel edge detection algorithm to find out the regions of lanes, and hough transform algorithm to detect straight lines. Among parallelized methods, the data level parallelism algorithm is easy to design, yet still problem with the bottleneck. The high-speed data level parallelism is suggested to reduce this bottleneck, which resulted in noticeable performance improvement. In the result of applying actual road video of black-box on our parallel algorithm, the measurement, in the case of single-core, is approximately 30 Frames/sec. Furthermore, in the case of octa-core parallelism, the data level performance is approximately 100 Frames/sec and the highest performance comes close to 150 Frames/sec.

본 논문에서는 차선 검출 알고리즘에 병렬처리를 적용하여 성능을 개선하였다. 차선 검출은 지능형 보조 시스템으로써 자동차가 차선을 이탈하면 경보음 또는 핸들을 보정해줌으로써 운전자를 돕는 보조 시스템이다. 병렬 처리 알고리즘 중 데이터 레벨 병렬처리는 설계가 간단하지만 병목현상이 발생하는 문제가 있다. 제안하는 고속 데이터 레벨 병렬처리 알고리즘은 병목현상을 줄여 성능이 향상되었다. 실제 블랙박스 도로 영상을 도입하여 알고리즘을 측정한 결과 싱글 코어 경우 약 30 Frames/sec의 성능을 얻었다. 병렬처리를 적용한 결과로써 옥타코어 기준으로 데이터 레벨인 경우 약 100 Frames/sec의 성능을, 고속 데이터 레벨인 경우는 약 150 Frames/sec의 성능을 얻을 수 있다.

Keywords

References

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