A Modularized Equalizer for Supercapacitor Strings in Hybrid Energy Storage Systems

Abstract

In hybrid energy storage systems, supercapacitors are usually connected in series to meet the required voltage levels. Equalizers are effective in prolonging the life of hybrid energy storage systems because they eliminate the voltage imbalance on cells. This study proposes a modularized equalizer, which is based on a combination of a half-bridge inverter, an inductor, and two auxiliary capacitors. The proposed equalizer inherits the advantages of inductor-based equalization systems, but it also offers unique merits, such as low switching losses and an easy-to-use control algorithm. The zero-voltage switching scheme is analyzed, and the power model is established. A fixed-frequency operation strategy is proposed to simplify the control and lower the cost. The switching patterns and conditions for zero-voltage switching are discussed. Simulation results based on PSIM are presented to verify the validity of the proposed equalizer. An equalization test for two supercapacitor cells is performed. An experimental hybrid energy storage system, which consists of batteries and supercapacitors, is established to verify the performance of the proposed equalizer. The analysis, simulation results, and experimental results are in good agreement, thus indicating that the circuit is practical.

I. INTRODUCTION

As a result of the requirements for mass energy storage in power systems and other applications, numerous types of elements for energy storage have been developed. In particular, supercapacitors (SCs) are widely used in electric vehicles/elevators, in which the motor accelerates and decelerates frequently, or in power systems for voltage regulation and system optimization [1]-[8]. The voltage of each SC cell is relatively low (2.7 V or 5.5 V typically), and generally, SC cells are connected in series to meet the voltage requirements in industrial applications.

The characteristics of SC cells, including their resistance and capacitance, tend to differ because of manufacturing techniques, architectures, and degradation. Thus, overcharging and over discharging are likely to occur and thereby cause serious overheating, shorten the lifetime of systems, and ultimately corrupt the strings. Hence, equalizers for balancing the voltages of all cells should be introduced. Different types of equalizers have been presented [9]-[32].

Typically, equalization methods come in two types: energy-consuming and energy-transferring equalization methods. The former method consumes the excess energy on specific cells by using resistors. This type of equalization system is easy to establish. However, excess energy is wasted, and such waste may increase string temperature and reduce reliability. In addition, the limitations of resistors restrict the response time of this equalization method.

The energy-transferring method can provide additional power flow paths for different cells and transfer the excess energy from one cell to another. For example, when the SC string is charging, the equalizer transfers the energy from the cell with a high voltage to the cell with a low voltage. Thus, the voltages of all cells can be balanced. Different types of elements, such as inductors, capacitors, and transformers can be used as buffers. Unlike the energy-consuming method, the energy-transferring method does not waste excess energy but instead transfers it to the cells lacking energy. Therefore, the efficiency and reliability of systems are improved, and string lifetime is prolonged.

Fig. 1 shows some typical equalizers and is divided into two groups. Figs. 1(a)–1(d) are based on the energy-consuming method. The resistors and Zener diodes are selected to connect in parallel to the SC cells to consume the excess energy [9]-[12]. The method can be used in cases of small capacity because of its low cost and simplicity.

Fig. 1.Overview of the equalizers. (a) Based on resistors, (b) Based on Zener diodes, (c) Based on resistors and switches, (d) Based on resistors and transistors, (e) Based on multi-winding transformers and bi-directional switches, (f) Based on single bridge multi-winding transformers, (g) Based on single bridge multi-transformers, (h) Based on fly-back converters, (i) Based on two-stage DC-DC converters, (j) Based on cascaded H-bridge converters, (k) Based on multiple inductors, (l) Based on a single inductor, (m) Based on capacitors, (n) Based on double-tiered capacitors, (o) Based on triple-tiered capacitors, (p) Based on Cuk converters, (q) Based on quasi-resonant zero-current switching converter, (r) Resonant switched-capacitor cell-balancing system, (s) Based on half-bridge inverters, and (t) Based on boost inverters.

Several types of topologies exist, and they are based on the different elements that function as buffers for the energy-transferring method [13]-[28].

Transformers are adopted in the circuits shown in Figs. 1(e)–1(i). High-/Middle-frequency techniques are often introduced to reduce the size and weight of the transformers. In [13], bi-directional switches and a multi-winding transformer are used to form an equalizer, as shown in Fig. 1(e). In [14], a single-bridge converter is used to charge all the SC cells through a multi-winding transformer or several two-winding transformers, as shown in Figs. 1(f)–1(g). As the voltage drop of the diode rectifier is about 1 V, the efficiency of the converter is low, and the energy cannot flow from one cell to another. In [15], several DC/DC converters based on high-frequency transformers are introduced to charge the cells in the string, as shown in Fig. 1(h); such string is complicated and difficult to control. A similar topology is shown in Fig. 1(i) and discussed in [16]. Some converters are introduced to maintain cell voltages.

An equalizer based on cascaded H-bridge converters is proposed in [17], [18]. Each SC string serves as the DC power of the H-bridge, and the outputs are connected in series. By adjusting the reference voltage of each cell, the charging/discharging power can be controlled, and the voltages can be balanced. The performance of the equalizer is affected by the load current, and the equalizer cannot work when the system is open-circuit, as shown in Fig. 1(j).

Inductors are introduced to transfer energy from one cell to another, as shown in [19], [20]. Fig. 1(k) shows the topologies in detail. At first, the energy is stored in the inductor and then transferred into the adjacent cells. Thus, several inductors are set between every two cells. In [21], a single inductor is used to store energy, which can then flow into other cells through the switches, as shown in Fig. 1(l).

In [12], capacitors are introduced to balance voltages, as shown in Fig. 1(m). At first, the energy is transferred into the capacitors. It then flows into the cells that lack energy. In [23], [24], additional switches and capacitors are installed to provide other routines that can shorten equalization time, as shown in Figs. 1(n) and 1(o).

Hybrid equalization systems are formed on the basis of the different types of elements, as shown in Figs. 1(p)–1(t). In [24], an equalizer derived from the Cuk converter is proposed, as shown in Fig. 1(p). Power can flow from one cell to an adjacent cell. Fig. 1(q) shows an equalization topology introduced in [25], in which one inductor and one capacitor work together to store and release the energy. In this way, quasi-resonant zero-current switching, which can reduce switching losses, is realized. A similar equalizer is shown in Fig. 1(r), and the operation scheme is introduced in [26]. Other equalization circuits are based on the different types of converters, such as half-bridge inverters [27] and boost converters [28] (Figs. 1(s) and (t)). These topologies are effective, but they lack modularity.

Manufacturing transformers is difficult, and the topology is not highly modularized. Load-based equalization circuits are simple, but they can only be used in certain applications. In inductor-based and capacitor-based equalization circuits, the parameters need not be precise, and the topology need not be highly modularized. In hybrid equalization circuits, soft-switching techniques can be applied to further reduce switching losses.

For these reasons, the present study proposes a modularized equalizer with zero-voltage switching (ZVS) and applies this equalizer to an SC string. This structure of the proposed equalization circuit is similar to the topology introduced in [19] (Fig. 1(k)). However, additional capacitors are employed to realize ZVS. As a result of its modularity, the proposed topology can be expanded. This design inherits the advantages of inductor-based topologies, overcomes the disadvantages of transformer-based topologies, and facilitates the expansion of equalization systems. ZVS is realized, and switching losses are consequently reduced. These conditions promote the increase in switching frequency, reduce the size of inductors, and prolong the lifetime of SC strings.

The proposed equalization circuit is analyzed in this work. A modularized control scheme is established. Simulation and experimental results are shown to verify the performance of the topology.

 

II. PROPOSED TOPOLOGY OF EQUALIZER

The equalizer proposed in this work is shown in Fig. 2. The string is made up of N SC cells, i.e., SC-1–SC-N. Their voltages are USC-1–USC-N.

Fig. 2.Topology of the proposed equalizer.

For every two adjacent SC cells, an equalizer is added to carry out equalization. As shown in Fig. 2, module-k is for SC-k and SC-(k+1), where k = 1, 2..., N−1. Every module consists of two switches, two auxiliary capacitors, and one inductor. For simplicity, all the inductors shown in Fig. 2 are equal to L, and all the capacitors are equal to C. The MOSFETs are labeled as K1-K2N-2.

The equalization system proposed in this work exhibits the following special features.

(1) The equalizer is based on several independent modules, the parameters of which are identical. Thus, the system is highly modularized, and the equalization system for different applications can be easily modified.

(2) ZVS can be achieved with auxiliary capacitors and inductors. Switching losses can be reduced, and the lifetime of the string is prolonged.

(3) All the modules are independent and utilize the same control schemes. The control algorithm is easy to realize with digital processors, and its cost is low.

 

III. EQUALIZATION SYSTEM ANALYSIS

A. Analysis of module-k

In Fig. 2, module-k is the equalizer for SC-k and SC-(k+1), where k = 1, 2, 3..., N−1. The topology of module-k is redrawn in Fig. 3. ik(I)-ik(VIII) represent the currents flowing to the different parts of the system. ik(α), ik(β), and iL are the currents flowing into module-k.

Fig. 3.Topology of module-k.

Based on Kirchhoff's current law, the currents in Fig. 3 can be calculated as

The equivalent circuit of module-k is shown in Fig. 4.

Fig. 4.Equivalent circuit of module-k.

In Fig. 4, L is the inductance, and iL is the current on the inductor. The voltages of the two SC cells are denoted by USC-k and USC-(k+1). K2k-1 and K2k are the two MOSFETs. C2k-1 and C2k are the auxiliary capacitors, which are used to realize ZVS. Their voltages are denoted by uC(2k-1) and uC(2k). iC(2k-1) and iC(2k) are the currents flowing into the two auxiliary capacitors.

Module-k works as follows.

[STAGE 1]: The analysis begins at t = t1 when K2k-1 is turned on, K2k is turned off, and iL = 0. The equivalent circuit is shown in Fig. 5. The state equations are

Fig. 5.Equivalent circuit when t1 ≤ t < t2 or t6 ≤ t < t7.

[STAGE 2]: After t2, K2k-1 and K2k are both turned off. Δ ≡ t2-t1 is employed to represent the time span between t1 and t2. The equivalent circuit is shown in Fig. 6. The state equations are shown in (3), where uC(2k-1)(t2) = 0, uC(2k)(t2) = USC-k+USC-(k+1), and iL(t2) = ΔUSC-k/L.

Fig. 6.Equivalent circuit when t2 ≤ t < t3 or t5 ≤ t < t6.

The solutions are shown in (4), where t2 ≤ t < t3.

ω is the resonant angular frequency and is defined as

At t3, uC(2k) = 0, and uC(2k-1) = USC-k+USC-(k+1). After t3, the parasitic diode conducts automatically, and K2k can be turned on. As uC(2k) = 0, ZVS can be realized. Moreover, t3 can be calculated as

where φ1 is the initial phase that can be written as (7). σ is defined as (8), which is the ratio of the two SC cell voltages.

In this stage, uc(2k-1) rises from 0 to USC-k+USC-(k+1), whereas uc(2k) falls from USC-k+USC-(k+1) to 0. Considering USC-k = USC-(k+1), we obtain the following:

The energy stored in the two auxiliary capacitors at t2 and t3 is the same. Thus,

[STAGE 3]: The equivalent circuit after t3 is shown in Fig. 7. The state equations are presented in (11), where t3 ≤ t < t4.

Fig. 7.Equivalent circuit when t3 ≤ t < t4 or t4 ≤ t < t5.

At t4, iL falls to zero. With (2), (10), and (11), we can calculate t4-t3 as

[STAGE 4]: The equivalent circuit after t4 is shown in Fig. 7. Γ ≡ t5−t4 is employed to represent the time span between t4 and t5. At the end of the stage, uC(2k-1) is USC-k+USC-(k+1), uC(2k) is 0, and iL is –ΓUSC-(k+1)/L.

[STAGE-5]: After t5, K2k-1 and K2k are both turned off. The equivalent circuit is shown in Fig. 6. For t5 ≤ t < t6, the solutions are

At t6, uC(2k-1) falls to 0, and K2k-1 is turned on. t6 can be obtained with (14), where φ2 is defined in (15).

[STAGE 6]: The equivalent circuit after t6 is shown in Fig. 5. The state equations are presented in (16), where t6 ≤ t < t7.

At t7, iL falls to zero, and another cycle starts. Similar to that in [STAGE 3], t7−t6 can be calculated as

Fig. 8 shows the voltages and current in an entire cycle. Table I shows the switching states from t1 to t7. In every cycle, ZVS for K1 and K2 is realized.

Fig. 8.Current and voltage waveforms in one cycle.

TABLE ISWITCHING STATES IN ONE CYCLE

B. Conditions for ZVS

At t3, if uC(2k)(t3) = 0 and iL(t3) ≥ 0, the ZVS of K2k can be realized, as shown in Fig. 8. From (6), (7), and (8), the result can be written as

Thus, the ZVS condition for K2k is

The surface described in (19) is drawn in Fig. 9. Noticeably, if σ ≤ 1, K2k can always work in ZVS mode. In other words, USC-k ≥ USC-(k+1) is the sufficient condition for the ZVS of K2k; otherwise, (19) must be met.

Fig. 9.ZVS conditions for K2k•.

A similar analysis can be carried out, and the ZVS condition for K2k-1 is

The surface described in (20) can be drawn in Fig. 10. K2k-1 can always work in ZVS mode when σ ≥ 1. In other words, USC-(k+1) ≥ USC-k is the sufficient condition for the ZVS of K2k-1; otherwise, (20) must be satisfied.

Fig. 10.ZVS conditions for K2k-1.

C. Power Model of Module-k

In Fig. 8, t1–t7 define one cycle for the equalization system.

Wk and Wk+1 are employed to represent the energy released by SC-k and SC-(k+1) because of module-k in one cycle.

From (21) and (22), we know that the power released by the two SCs is changed by Cell-k. The difference Wk^ is given by

and

Hence, increasing Δ or decreasing Γ can transfer the energy from SC-k to SC-(k+1), whereas decreasing Δ or increasing Γ can transfer energy from SC-(k+1) to SC-k.

D. Power Model of the SC Cells in the String

For every SC (SC-k) in the string, the energy stored in it can be changed by three factors:

Hence, in the SC string, the energy flowing out of SC-k caused by the equalization system can be written as .

E. Operation Strategy

For every module in the equalization system, the operation strategy can be described as follows:

When the equivalent resistance in the circuit is considered, the minimal value of Δ or Γ, denoted by ε, should be set to make sure both switches can realize ZVS. That is,

Thus, the operation strategy can be drawn in Fig. 11. The flow chart shown in Fig. 11 presents three branches. When the two voltages are almost equal (for example, the difference is 0.1 V), the switches are turned off because equalization in such a case is not necessary. Otherwise, the left branch is chosen when the upper capacitor voltage is high, and the right branch is chosen when the upper capacitor voltage is low.

Fig. 11.Flow chart of operation strategy.

 

IV. SIMULATION RESULTS

The simulation system for module-1 shown in Fig. 2 is established in PSIM6.0. Two 1 F capacitors USC-1 and USC-2 are connected in series. Two MOSFETs are controlled by a DLL block written in C language. The simulation mainly focuses on the verification of the equalizer and the theory proposed in Section III. The equivalent circuit of the simulation topology is shown in Fig. 12.

Fig. 12.Equivalent circuit of the simulation system.

The parameters of the simulation system are shown in Table II. In Table II, the resistance of L1 is used to represent the equivalent resistance in the circuit. Given that the initial voltage of C1 is 0, the initial state of the simulation system is similar to that shown in Fig. 5, in which the equalizer starts from t1.

TABLE IIPARAMETERS OF THE SIMULATION SYSTEM

The maximal current is set to 3 A. From (25) and (26), we can set Δ, Γ ≤ 120 μs. When the equivalent resistance of the circuit is not considered, Δ and Γ can be

The results are shown in Fig. 13. As a result of the equivalent resistance of the circuit, uC1 cannot drop to 0, and K1 cannot work in ZVS mode. ε, which is introduced in (27), is set to 55 μs in the simulation system. Therefore, Δ and Γ can be

Fig. 13.Simulation results for module-1. (Δ = 110 μs, Γ = 0 μs when USC-1 > USC-2; Δ = 0 μs, Γ = 110 μs when USC-1 < USC-2).

The simulation results are shown in Fig. 14. uC1 and uC2 can both fall to 0, which means that K1 and K2 can work in ZVS mode. All the waveforms, such as the voltages and currents, coincide with the theoretical analysis in Fig. 8.

Fig. 14.Simulation results for module-1. (Δ = 110 μs, Γ = 55 μs when USC-1 > USC-2; Δ = 55 μs, Γ = 110 μs when USC-1 < USC-2).

Fig. 15 shows a comparative picture of the voltages when the equalization system is either enabled or disabled. When the equalization system is disabled, the voltage difference considerably increases. When the equalization system is enabled, USC-2 decreases in a slow pace because the equalization system transfers the energy from USC-1 to USC-2 to keep the voltages equal. After about 0.95 s, the two voltages become equal (less than 0.2 V). The load of USC-2 is always larger than that of USC-1 in the whole process. Hence, the function of the equalization system is proved.

Fig. 15.Simulation results for SC cell voltages. (Δ = 110 μs, Γ = 55 μs when USC-1 > USC-2; Δ = 55 μs, Γ = 110 μs when USC-1 < USC-2).

 

V. EXPERIMENTAL RESULTS

A. Two-cell Experimental System

A two-cell experimental system is built to verify the validity and correction of the proposed topology. Several 5.5 V/4 F super capacitors are adopted. The control algorithm is implemented in CPLD (EPM1270, by ALTERA) placed on the control board. The equalizer is placed on another board. The two boards are connected via a group of pins, as shown in Fig. 16.

Fig. 16.Equivalent circuit and photo of the two-cell experimental system.

In Fig. 16, two SC cells are connected in series. The equivalent capacitance of each SC cell is 3 × 4 F. A pre-charge resistor is connected in the circuit to limit the current flowing out of the AC/DC power module. The type of the two MOSFETs is 75NF75. The other parameters of the experimental system are shown in the photo.

The parameters obtained in (29) are also adopted in the experimental system. The power supply of the control board can be turned on or off. Thus, the equalization system can be enabled or disabled, and the comparative photos can be obtained.

The charging and discharging processes of an SC when the equalization system is disabled are shown in Fig. 17. As shown in Fig. 16, the string is charging when the main switch is on, whereas it is discharging when the main switch is off. In the whole process, USC-1 is higher than USC-2 because the loads are different (51.9 and 25.8 Ω, respectively).

Fig. 17.Charging and discharging of the SC string without equalizers.

Fig. 18 shows the experimental results when the equalization system is enabled. The two voltages are kept approximately equal in the charging and discharging processes.

Fig. 18.Charging and discharging of the SC string with equalizers.

Fig. 19 shows the gate signals for the two MOSFETs. In every cycle, Δ is 110 μs, and Γ is 55 μs. The two voltages are balanced because of the equalization system.

Fig. 19.SC voltages and gate signals.

Fig. 20 shows the auxiliary capacitor voltages and gate signals of the MOSFETs. Obviously, the switches can work in ZVS mode.

Fig. 20.Auxiliary capacitor voltages and gate signals.

As shown in Fig. 21, iL rises when K1 is turned on, and iL drops when K1 is turned off. The positive peak value of iL is about 3 A, which is limited by Δ and the circuit parameters.

Fig. 21.Auxiliary capacitor voltages, inductor current, and gate signals.

The power loss in the experimental system can be measured in the following steps:

(1) Calculate the power flowing into the two-cell experimental system, denoted by Pin.

(2) Calculate the power consumed by the two resistors connected in parallel with SC-1 and SC-2, denoted by Pout.

(3) The power loss is Pin-Pout.

As shown in Fig. 22, the power loss in the equalization system is around 2.5 W. The efficiency of the system can be calculated as Pout/Pin, and generally, the power loss of the equalizer is not larger than 2.5 W. When Pout is large, the efficiency increases. According to the experimental results shown in Fig. 22 (Pout=1 W), the efficiency is about 29%. When Pout is 3.5 W, the efficiency is about 59%.

Fig. 22.Power loss in the experimental system. (Top) Power loss. (Middle) Voltages of SC string. (Bottom) Data and results.

B. Hybrid Energy Storage Experimental System

A hybrid energy storage system (HESS) is built to validate the performance of the SC string with the equalization systems proposed in this work.

In the HESS, the battery is of high energy density, but the response is low. The SCs introduced can improve the dynamic characteristics of the system.

The prototype consists of two H-bridges. In one H-bridge, there is a 36 V battery on the DC bus. In the other H-bridge, a super capacitor string comprising 21 5.5 V/4 F SCs (3 in parallel, 7 in series) is installed on the DC bus. Thus, the equivalent capacitance of the super capacitor string is 1.7 F. The rating voltage of the string is 38.5 V.

The main control board is based on DSP (TMS320F28335) and CPLD (EPM1270). It supports as many as 15 H-bridges. The main control board and the H-bridge are connected via a cable comprising four pairs of twisted wires. These pairs correspond to the power supply for the control board in the H-bridge, the differential serial signals to the H-bridge, the differential serial signals from the H-bridge, and the DC bus voltage of the H-bridge. The output voltage of the HESS is uout; ucap is the output voltage of the H-bridge connected to the SC string.

As shown in Fig. 23, the HESS can be connected to the power grid, motors, and electric vehicles to release or absorb energy and thereby reduce energy consumption while improving system reliability. For example, the HESS can be connected to the power grid and function as an active/reactive power regulator.

Fig. 23.Topology and photo of the HESS.

In Fig. 23, g1-g8 are the gate signals of the MOSFETs in the two H-bridges. These signals can be generated with a modified PWM method shown in Fig. 24.

Fig. 24.Carriers and reference voltages when charging and discharging in the HESS.

As shown in Fig. 24, the peak value of uH1 is equal to the battery voltage in the H-bridge, and the peak value of uH2 is equal to the SC string voltage. When the HESS discharges, the voltage of the SC string drops, as shown in Fig. 24(a). By contrast, when the HESS is charging, the voltage of the SC string increases, as shown in Fig. 24(b). The gate signals in the two H-bridges can be generated as

The serial signal, which carries the gate signals and commands to the H-bridge, is shown in Fig. 25. Every data frame consists of seven idle bits, one start bit and, four data bits. The first two data bits indicate the gate signals for the H-bridge. The gate signals of K1 and K2 after decoding are shown in Fig. 25. The deadband is 3μs. Given the driver circuit, a 1 μs delay occurs.

Fig. 25.Serial signal and gate signals.

The HESS is connected to the single-phase power grid through an inductor LHS, as shown in Fig. 23. The control diagram is shown in Fig. 26. The reference current iref is generated on the basis of the charging or discharging state. A proportion current regulator is introduced to control the current flowing out. As discussed in [29], [30], the proportional current regulator cannot track sinusoidal signals with a zero steady-state error. Nevertheless, the charging and discharging for the HESS can be accomplished. Such process is enough to test the performance of the equalization system and control algorithm.

Fig. 26.Control diagram of the HESS.

The parameters of the HESS are shown in Table III.

TABLE IIIPARAMETERS OF THE EXPERIMENTAL SYSTEM

The voltage of the SC string is denoted by USC. In the experiment, 10 V ≤ USC ≤ 30 V. As shown in Fig. 27, when the HESS is charging, the angle between ug and ig is larger than 90 degrees. Moreover, uout comprises five voltage levels, whereas ucap comprises three voltage levels. When discharging, the angle between ug and ig is less than 90 degrees. The power flows from the HESS to the grid, as shown in Fig. 28. The experimental results for the charging and discharging processes coincide with those in Fig. 24.

Fig. 27.Experimental results of the HESS when charging.

Fig. 28.Experimental results of the HESS when discharging.

The voltage of the SC string is shown in Fig. 29. In the charging stage, USC rises from 10 V to 25 V in 25 s. In the discharging stage, USC drops to 10 V in 12 s. Table IV shows the voltages of all the SC cells in the experiment. The maximal errors are 6.80% (positive) and 4.16% (negative), which indicate that the equalization system is practical. The voltages of the SC cells are depicted in Fig. 30. The cells are clearly balanced, and the SC string can work at the designed voltage level.

Fig. 29.Experimental results of the SC string voltage.

TABLE IVSC CELL VOLTAGES IN THE HESS

Fig. 30.Voltages of the SC cells in the HESS.

 

VI. CONCLUSION

The different characteristics of SC cells necessitate the installation of equalizers on SC strings to achieve balanced voltages. Equalizers should meet certain requirements, such as high efficiency, high modularity, and ease of control. This work proposes a topology for an equalizer based on a half-bridge inverter, an inductor, and two auxiliary capacitors. The inductor and auxiliary capacitors can make the switches work in ZVS mode and thereby reduce power losses and improve system efficiency. The equalizers can transfer energy between every two adjacent SC cells and make the voltages balanced. The working schemes and characteristics of the switches are discussed. The conditions for ZVS are proposed, and two key variables Δ and Γ are employed to indicate the switching patterns of the equalization system. A digital processor-based control algorithm that is inexpensive and easy to implement is proposed. The equalizer is highly modularized and can be used in SC strings regardless of the number of cells. Typically, for a string with N SC cells, the number of equalizer modules is N−1. The resistance of the circuit is considered, and it is found to cause the failure of ZVS. The reason is explained in this work, and a modified control method is given. The simulation results show that the analysis is correct and that the control method is effective.

A two-cell experimental system is established to test the equalizer module and measure system power losses. The results indicate that the equalizer can balance voltages under unbalanced load conditions. Moreover, the maximal power loss of the equalizer is about 2.5 W.

An HESS is built to estimate the performance of the equalization system with six equalizer modules. Batteries and SCs are utilized to store the energy from the power grid. The battery is of high power density, but the response is low. The SC string can charge and discharge quickly. The combination of batteries and SCs works well in the storage system. The charging and discharging performance of the HESS is tested. The SC string, which is made up of seven 5.5 V/12 F SC cells, can work at the designed voltage levels.

The topologies and theoretical analysis are validated by the simulation and experimental results. The equalizer can also be used in other types of strings, such as battery strings and fuel-cell strings.