Journal of Broadcast Engineering (방송공학회논문지)

The Korean Institute of Broadcast and Media Engineers (한국방송∙미디어공학회)
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A New ASIC Design of Digital Hologram Generation Circuit for 12×12 Block

12×12 블록의 디지털 홀로그램 생성 회로의 ASIC 설계

  • Lee, Yoon-Hyuk (Dept. Electronic Materials Engineering, Kwangwoon University) ;
  • Kim, Dong-Wook (Dept. Electronic Materials Engineering, Kwangwoon University) ;
  • Seo, Young-Ho (Ingenium college of liberal arts, Kwangwoon University)
  • 이윤혁 (광운대학교 전자재료공학과) ;
  • 김동욱 (광운대학교 전자재료공학과) ;
  • 서영호 (광운대학교 인제니움학부)
  • Received : 2016.08.29
  • Accepted : 2016.10.11
  • Published : 2016.11.30
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Abstract

In this paper, we propose a new hardware architecture to generate computer-generated holograms based on the block based calculation method and implement a VLSI (very large scaled integrated circuit) in ASIC (application specific integrated circuit) environment. The proposed hardware has a structure that can produce a part of a hologram in the unit of a block in parallel. After calculating a block of a hologram by using an object point, the calculation is repeated to all object points and intermediate results from them are accumulated to produce a final block of a hologram. Through this structure, we can make various size of holograms with the optimized memory access in real-time operation. The proposed hardware was implemented in the Hynix 0.18um CMOS technology of Magna chip Inc. and has 876,608 gate counts. It can generate complex holograms unlike the previous researches and stably operate in the clock frequency of 200MHz.

본 논문에서는 블록 기반으로 홀로그램을 생성할 수 있는 하드웨어의 구조를 제안하고, ASIC (application specific integrated circuit) 환경을 이용하여 VLSI(very large scaled integrated circuit) 회로로 구현하였다. 제안한 하드웨어는 홀로그램 평면의 블록 단위로 병렬 연산을 수행할 수 있는 구조를 가지고 있다. 한 객체 포인트에 대한 홀로그램 블록의 영향을 독립적으로 연산한 후에 모든 객체 포인트에 대한 결과를 누적하여 홀로그램을 생성하였다. 이러한 구조를 통해서 다양한 크기의 홀로그램을 하드웨어를 이용하여 생성할 수 있으면서 최소의 메모리 접근량을 사용하면서 실시간으로 동작이 가능하도록 하였다. 제안한 하드웨어는 Magna chip의 Hynix 0.18μm CMOS 라이브러리를 이용하여 구현되었고, 실수항과 복소항의 복소 홀로그램을 생성할 수 있다. 제안한 하드웨어는 최대 200MHz에서 안정적으로 동작할 수 있고, 약 876,608개의 게이트 수로 구현되었다.

Keywords

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