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NAND Flash memory 소자 기술 동향

  • Published : 2015.07.25
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Abstract

고집적화를 위한 Floating Gate NAND 개발과정에서 몇 차례 기술적 한계상황에 직면하였었지만, Air-Gap, Double patterning, Multi-level Cell, Error Correction Code과 같은 breakthrough idea 을 활용하여 1Xnm까지 성공적인 scale-down 을 하였고 10nm 까지도 바라보고 있지만, 10nm 미만으로는 적절한 방안을 찾지 못한 상황입니다. CTD 의 3D NAND Flash는 Aspect Ratio, Poly channel의 intrinsic 특성, Data 보존 능력 등 해결 해야 할 issue 들이 남아 있지만, F.G Flash 의 지난 20년간 Lesson-learn 과 Band engineering, Channel Si, PUC 의 요소기술 개발 및 System algorithm 개발, QLC 개발 등을 통하여 F.G Flash를 넘어 지속적인 Cost-down 이 가능할 것입니다.

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References

  1. S. Hong, "Memory Technology Trend and Future Challenges", IEEE IEDM Tech. Dig., pp 292-295, 2010.
  2. H. Tanaka et al., "Pipe-shaped BiCS Flash Memory with 16 Stacked Layers and Multi-Level-Cell Operation for Ultra High Density Storage Devices", SOVT, pp 136-137, 2009.
  3. J.H. Jang et al., "Vertical Cell Array using TCAT(Terabit Cell Array Transistor) Technology for Ultra High Density NAND Flash Memory TCAT", SOVT, pp 192-193, 2009.
  4. E.S. Choi, "Device Considerations for High Density and Highly Reliable 3D NAND Flash Cell in Near Future" IEDM, p211, 2012
  5. S.K. Lee, "Scaling Challenges in NAND Flash Device toward 10nm Technology" IMW, p6,2012
  6. J.D. Choi, 2010 IMW Short course
  7. S.W. Park, 2012 Flash Memory Summit, keynote2
  8. D. Kang et al., "The Air Spacer Technology for Improving the Cell Distribution in 1 Giga Bit NAND Flash Memory", NVSMW, pp. 36-37, 2006
  9. J.-D. Lee, S.-H. Hur, and J.-D. Choi, "Effects of floatinggate interference on NAND flash memory cell operation," IEEE Electron Device Letters, vol. 23, no. 5, pp. 264-266, 2002 https://doi.org/10.1109/55.998871
  10. Y. Fukuzumi et al. "Optimal integration and characteristics of vertical array devices for ultra-high density, bit-cost scalable Flash memory" IEDM Tech. Dig., 449-52 (2007)
  11. S.K Park, "Technology scaling challenge and Future prospects of DRAM and NAND flash memory" IMW 2015
  12. H.T. Lue et al, "BE-SONOS: A bandgap engineered SONOS with excellent performance and reliability", IEDM Tec. Dig., pp 547 - 550(2005)