IEIE Transactions on Smart Processing and Computing

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design of a 12b SAR ADC for DMPPT Control in a Photovoltaic System

  • Rho, Sung-Chan (Department of Electronics Engineering, Seokyeong University) ;
  • Lim, Shin-Il (Department of Electronics Engineering, Seokyeong University)
  • Received : 2015.05.15
  • Accepted : 2015.06.15
  • Published : 2015.06.30
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Abstract

This paper provides the design techniques of a successive approximation register (SAR) type 12b analog-to-digital converter (ADC) for distributed maximum power point tracking (DMPPT) control in a photovoltaic system. Both a top-plate sampling technique and a $V_{CM}$-based switching technique are applied to the 12b capacitor digital-to-analog converter (CDAC). With these techniques, we can implement a 12b SAR ADC with a 10b capacitor array digital-to-analog converter (DAC). To enhance the accuracy of the ADC, a single-to-differential converted DAC is exploited with the dual sampling technique during top-plate sampling. Simulation results show that the proposed ADC can achieve a signal-to-noise plus distortion ratio (SNDR) of 70.8dB, a spurious free dynamic range (SFDR) of 83.3dB and an effective number of bits (ENOB) of 11.5b with bipolar CMOS LDMOD (BCDMOS) $0.35{\mu}m$ technology. Total power consumption is 115uW under a supply voltage of 3.3V at a sampling frequency of 1.25MHz. And the figure of merit (FoM) is 32.68fJ/conversion-step.

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References

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