Journal of Sensor Science and Technology (센서학회지)

The Korean Sensors Society (한국센서학회)
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Design of Lightweight Parallel BCH Decoder for Sensor Network

센서네트워크 활용을 위한 경량 병렬 BCH 디코더 설계

  • Choi, Won-Jung (Div. of of Electronics, Information and Communication Engineering, Kangwon National University) ;
  • Lee, Je-Hoon (Div. of of Electronics, Information and Communication Engineering, Kangwon National University)
  • 최원정 (강원대학교 전자정보통신공학부) ;
  • 이제훈 (강원대학교 전자정보통신공학부)
  • Received : 2015.03.24
  • Accepted : 2015.05.28
  • Published : 2015.05.31
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Abstract

This paper presents a new byte-wise BCH (4122, 4096, 2) decoder, which treats byte-wise parallel operations so as to enhance its throughput. In particular, we evaluate the parallel processing technique for the most time-consuming components such as syndrome generator and Chien search owing to the iterative operations. Even though a syndrome generator is based on the conventional LFSR architecture, it allows eight consecutive bit inputs in parallel and it treats them in a cycle. Thus, it can reduce the number of cycles that are needed. In addition, a Chien search eliminates the redundant operations to reduce the hardware complexity. The proposed BCH decoder is implemented with VHDL and it is verified using a Xilinx FPGA. From the simulation results, the proposed BCH decoder can enhance the throughput as 43% and it can reduce the hardware complexity as 67% compared to its counterpart employing parallel processing architecture.

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References

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