참고문헌
- Choi, S. and Lee, J. (2009), Real-Time Scheduling System Re-Construction for Automated Manufacturing in a Korean 300mm Wafer Fab, Journal of intelligence and information systems, 15(4), 213-224.
- Choi, S. (2012), Scheduling Algorithms for Minimizing Total Weighted Flowtime in Photolithography Workstation of Fab, Journal of the Society of Korea Industrial and Systems Engineering, 35(1), 79-86.
- Chung, J. and Jang, J. (2009), A WIP Balancing Procedure for Throughput Maximization in Semiconductor Fabrication, IEEE Transaction on Semiconductor Manufacturing, 22(3), 381-390. https://doi.org/10.1109/TSM.2009.2017666
- Duemmler, M. and Wohlleben, J. (2012), A Framework for Effective WIP Flow Management in Semiconductor Frontend Fabs, Proceedings of the 2012 Winter Simulation Conference, 1-6.
- Huang, H.-W., Lu, C.-H., and Fu, L.-C. (2007), Lot Dispatching and Scheduling Integrating OHT Traffic, Information in the 300mm Wafer Fab, Proceedings of the 3rd Annual IEEE Conference on Automation Science and Engineering, 495-500.
- Iriuchijima, K., Sakamoto, H., and Fujihara, M. (1998), WIP Allocation Planning for Semiconductor Factories, Proceedings of the 37th IEEE Conference on Decision and Control, 2716-2721.
- Jeong, K.-C. (2008), An Adaptive Dispatching Architecture for Constructing a Factory Operating System of Semiconductor Fabrication : Focused on Machines with Setup Times, IE Interfaces, 22(1), 73-84.
- Kao, Y., Chang, S., and Chang, C. (2014), Target Setting with Consideration of Target-Induced Operation Variability for Performance Improvement of Semiconductor Fabrication, Automation Science and Engineering (CASE), 2014 IEEE International Conference on, 774-779.
- Kim, Y.-H., Lee, J.-H., and Sun, D.-S. (2008), The Operational Optimization of Semiconductor Research and Development Fabs by Fab-wide Scheduling, The Transactions of the Korean Institute of Electrical Engineers, 57(4), 692-699.
- Lee, W. J. (2002), Optimize WIP Scale through Simulation Approach with WIP, Turnover Rate and Cycle Time Regression Analysis in Semiconductor Fabrication, Semiconductor Manufacturing Technology Workshop 2002, 299-301.
- Li, L., Qiao, F., and Wu, Q. (2004), X-Application of Pheromone to Dynamic Real-Time Scheduling for Semiconductor Wafer Fab, Proceedings of 2004 Automation Congress, 18, 425-430.
- Liu, C.-M., Kuo, C.-J., and Chi, C.-Y. (2006), A Dynamic Method for Optimal WIP Allocation and Control in a Semiconductor Manufacturing System, Semiconductor Manufacturing, IEEE International Symposium on 2006 Sept., 61-65.
- Miyashita, K., Senoh, K., Ozaki, H., and Matsuo, H. (2003), Constant Time Interval Production Planning with Application to WIP Control in Semiconductor Fabrication, Proceedings of the 2003 Winter Simulation Conference, 1329-1337.
- Potti, K., Bunch, T., and Clark, C. (1994), Using simulation modeling to calculate WIP levels in semiconductor manufacturing, 1994 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, 193.
- Qiu, R., Burda, R., and Chylak, R. (2002), Distributed WIP Control in Advanced Semiconductor Manufacturing, IEEE/SEMI Conference and Workshop 2002, 49-54.
- Ruijie, S. and Zhongjie, W. (2008), DC-WIP - A New Release Rule of Multi-Orders for Semiconductor Manufacturing Lines, International Conference on System Simulation and Scientific Computing 2008 Oct., 1395-1399.
- Yang, K., Chung, Y., Kim, D. and Park, S. C. (2014), Bottleneck Detection Framework Using Simulation in a Wafer FAB, Transactions of the Society of CAD/CAM Engineers, 19(3), 214-223. https://doi.org/10.7315/CADCAM.2014.214
- Yea, S.-H. and Kim, S.-Y. (1997), Shift Scheduling in Semiconductor Wafer Fabrication, IE Interfaces, 10(1), 1-13.