IEIE Transactions on Smart Processing and Computing

The Institute of Electronics and Information Engineers (대한전자공학회)
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Performance Analysis of HEVC Parallelization Methods for High-Resolution Videos

  • Ryu, Hochan (Department of Computer Engineering, Kwangwoon University) ;
  • Ahn, Yong-Jo (Department of Computer Engineering, Kwangwoon University) ;
  • Mok, Jung-Soo (Department of Computer Engineering, Kwangwoon University) ;
  • Sim, Donggyu (Department of Computer Engineering, Kwangwoon University)
  • Received : 2014.04.05
  • Accepted : 2014.11.19
  • Published : 2015.02.28
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Abstract

Several parallelization methods that can be applied to High Efficiency Video Coding (HEVC) decoders are evaluated. The market requirements of high-resolution videos, such as Full HD and UHD, have been increasing. To satisfy the market requirements, several parallelization methods for HEVC decoders have been studied. Understanding these parallelization methods and objective comparisons of these methods are crucial to the real-time decoding of high-resolution videos. This paper introduces the parallelization methods that can be used in HEVC decoders and evaluates the parallelization methods comparatively. The experimental results show that the average speed-up factors of tile-level parallelism, wavefront parallel processing (WPP), frame-level parallelism, and 2D-wavefront parallelism are observed up to 4.59, 4.00, 2.20, and 3.16, respectively.

Keywords

References

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