참고문헌
- G. E. Moore, Cramming more components onto integrated circuits, Proc. IEEE, 86, 82-85, 1998. https://doi.org/10.1109/JPROC.1998.658762
- Wikipedia, http://en.wikipedia.org.
- A. B. Sachid and H. Chenming, Denser and more stable SRAM using FinFETs with multiple fin heights, IEEE Trans. Electron Devices, 59, 2037-2041, 2012. https://doi.org/10.1109/TED.2012.2199759
- C. Yang-Kyu, K. Asano, N. Lindert, V. Subramanian, K. Tsu-Jae, J. Bokor, and H. Chenming, Ultra-thin body SOI MOSFET for deepsub-tenth micron era, Proc. 1999 Int. Electron Devices Meeting Technical Dig., IEDM'99, 919-921, 1999.
- ASML homepage, http://www.asml.com.
- J. Fung Chen, Tom Laidig, Kurt E. Wampler, and Roger Caldwell, Optical proximity correction for intermediate-pitch features using sub-resolution scattering bars, J. Vac. Sci. & Technol. B, 15, 2426-2433, 1997.
- Kelin J. Kuhn, Martin D. Giles, David Becher, Pramod Kolar, Avner Kornfeld, Roza Kotlyar, Sean T. Ma, Atul Maheshwari, and Sivakumar Mudanai, Process Technology Variation, IEEE Trans. on Elec. Dev., 58, 2197-2208, 2011. https://doi.org/10.1109/TED.2011.2121913
- S. Miller, EUVL scanners operational at chipmamers, Semicon West, 2011.
- SK hynix homepage, http://www.skhynix.com.
- Cheol Seong Hwang, Atomic layer Deposition for Semiconductors, Springer, New York, 2014.
- M. Verghese, J. W. Maes, N. Kobayashi, Atomic layer deposition goes mainstream in 22nm logic technologies, Solid State, Technology, 53, 2010.
- Kazuhiko Endo, Yuki Ishikawa, Takashi Matsukawa, Yongxum Liu, Shin-ichi O'uchi, Kunihiro Sakamoto, Junichi Tsukada, Hiromi Yamauchi, Meishoku Masahara, Enhancement of FinFET performance using 25-nm-thin sidewall spacer grown by atomic layer deposition, Sol. State Elec., 74, 13-18, 2012. https://doi.org/10.1016/j.sse.2012.04.005
- Qi Xie, Shaoren Deng, Marc Schaekers, Dennis Lin, Matty Caymax, Annelies Delabie, Xin-Ping Qu, Yu-Long Jiang, Davy Deduytsche, and Christophe Detavernier, Germanium surface passivation and atomic layer deposition of high-k dielectrics-a tutorial review on Ge-based, MOS capacitors, Semicond. Sci. Technol., 27, 074012, 2012. https://doi.org/10.1088/0268-1242/27/7/074012
-
Houssa M, Conard T, Bellenger F, Mavrou G, Panayiotatos Y, Sotiropoulos A, Dimoulas A, Meuris M, Caymax M and Heyns M M, Electrical Properties of Atomic-Beam Deposited
$Ge_{1-x}N_x$ /$HfO_2$ Gate Stacks on Ge, J. Electrochem. Soc., 153 G1112, 2006. https://doi.org/10.1149/1.2357714 -
Bai W P, Lu N and Kwong D L, Si interlayer passivation on germanium MOS capacitors with high-
${\kappa}$ dielectric and metal gate IEEE Electron Device, Lett. 26, 378-380, 2005. https://doi.org/10.1109/LED.2005.848128 -
Lee C H, Nishimura T, Nagashio K, Kita K and Toriumi A, High-Electron-Mobility Ge/
$GeO_2$ n-MOSFETs With Two-Step Oxidation, IEEE Trans. Electron Devices 58, 2011. - Tech design forum, Triple patterning and self-aligned double patterning (SADP), http://www.techdesignforums.com.