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UHD급 영상패턴 제어 신호발생기를 위한 고속 시리얼 인터페이스의 신호 무결성 분석

Analysis of Signal Integrity of High Speed Serial Interface for Ultra High Definition Video Pattern Control Signal Generator

  • 투고 : 2014.08.01
  • 심사 : 2014.09.11
  • 발행 : 2014.09.30

초록

최근 초고화질(UHD) 영상시스템의 출현으로 인해 고해상도, 대용량의 4K-UHD급 LCD TV 신호 전송은 높은 해상도와 데이터 확장에 따른 케이블 및 커넥터 수의 증가로 서로 다른 케이블 간의 EMI, 스큐(Skew) 문제로 시스템 구현에 한계가 있다. 차세대 V-by-One HS 인터페이스는 초고해상도 영상처리 IC 및 TCON 간의 새로운 인터페이스 기술로써 600Mbps에서 3.75Gbps의 다양한 데이터 속도로 효율적인 전송이 가능하여 한계를 극복할 수 있다. 본 논문에서는 V-by-One HS IBIS(Input/Output Buffer Information Specification) 모델 시뮬레이션을 통하여 주파수 공진모드의 전압 분포와 PCB 설계 방법을 제안하고 고속영상 신호에 대한 신호 무결성의 검증 방법을 제안하였다.

In accordance with 4K UHD(Ultra High Definition) LCD television's higher resolution and data expansion, LCD TV had to face problems such as increasing numbers of cables and tangible skews problems among cables. The V-by-One HS is a new interface technology in the path between the image processing IC and timing control (TCON) board. The variable speed from 600 Mbps to 3.75 Gbps effectively meets the requirements of various different pixel rates. In this paper, we use the V-by-One HS interface to illustrate our proposed simulation method of frequency resonance mode and PCB design approach to model the effects of signal integrity for high speed video signal using an IBIS models.

키워드

참고문헌

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