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Pixel Block 단위 Varying Interpolator를 적용한 타일기반 Rasterizer 설계

A Design of a Tile-Based Rasterizer Using Varying Interpolator by Pixel Block Unit

  • 투고 : 2014.09.03
  • 심사 : 2014.09.23
  • 발행 : 2014.09.30

초록

본 논문은 Varying Interpolator를 개선하여 다수의 Pixel을 한 번에 처리할 수 있는 Rasterizer 구조를 제안한다. 설계한 Rasterizer의 Varying Interpolator는 한 번에 16 Pixel을 처리 할 수 있으며 최대 64개의 색상을 출력으로 가진다. 또한 Rasterizer의 연산을 행렬연산 및 행렬변환으로 구성하여 연산의 중복성을 줄이고 재사용성을 높여 Rasterizer의 처리 속도를 높였다. 제안하는 구조의 Rasterizer 는 기존의 연구와 비교하여 색상 보간은 11%, Rasterizer 전체 처리 속도는 17% 향상된 성능을 보였다.

In this paper, we propose a rasterizer architecture using varying interpolator which process several pixels at a time. Proposed rasterizer is able to handle 16 pixel at a time and output the color of up to 64. It can reduce the redundancy of calculation by configuring a matrix transformation and matrix calculation for rasterization, and it can enhance the speed of rasterizer by increasing the reusability. As a result, proposed rasterizer has improve 11% in color interpolation, 17% in the processing speed of the rasterizer by comparing with conventional research.

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참고문헌

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