한국통신학회논문지 (The Journal of Korean Institute of Communications and Information Sciences)

  • 제39B권7호
  • /
  • Pages.440-448
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  • 2014
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  • 1226-4717(pISSN)
  • /
  • 2287-3880(eISSN)
한국통신학회 (The Korean Institute of Commucations and Information Sciences)
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TWDM-PON 응용을 위한 4×10 Gb/s Transimpedance Amplifier 어레이 설계 및 구현

A Design and Implementation of 4×10 Gb/s Transimpedance Amplifiers (TIA) Array for TWDM-PON

  • Yang, Choong-Reol (ETRI Optical Internet Research Department Optical Access Laboratory) ;
  • Lee, Kang-Yoon (SungKyunKwan University Electric & Electronics Engineering Department) ;
  • Lee, Sang-Soo (ETRI Optical Internet Research Department Optical Access Laboratory)
  • 투고 : 2014.03.31
  • 심사 : 2014.06.20
  • 발행 : 2014.07.31
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초록

TWDM-PON 시스템 수신부에 사용될 $4{\times}10$ Gb/s Transimpedance Amplifier (TIA) 어레이가 $0.13{\mu}m$ CMOS 기술로 구현하였다. TIA의 대역폭 향상을 위하여 인덕터 피킹 기술과 1.2 V 기반의 저전압 설계기술을 제안한다. 0.5 pF PD 용량에서 7 GHz 3 dB 대역폭을 구현한다. 1.2V 공급에서 채널당 31 mW를 소모하는 동안 Trans-resistance gain 은 $71.81dB{\Omega}$이다. TIA의 입력 감도는 -33.62 dBm를 갖는다. 4 채널을 포함하는 전체 칩 크기는 $1.9mm{\times}2.2mm$ 이다.

A $4{\times}10$ Gb/s Transimpedance Amplifier (TIA) array is implemented in $0.13{\mu}m$ CMOS process technology, which will be used in the receiver of TWDM-PON system. A technology for bandwidth enhancement of a given $4{\times}10$ Gb/s TIA presented under inductor peaking technology and a single 1.2V power supply based low voltage design technology. It achieves 3 dB bandwidth of 7 GHz in the presence of a 0.5 pF photodiode capacitance. The trans-resistance gain is $50dB{\Omega}$, while 48 mW/ 1channel from a 1.2 V supply. The input sensitivity of the TIA is -27 dBm. The chip size is $1.9mm{\times}2.2mm$.

키워드

참고문헌

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