Journal of Korea Society of Industrial Information Systems (한국산업정보학회논문지)

Korea Society of Industrial Information Systems (한국산업정보학회)
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A Simulation Framework for CUDA Computing on Non-x86 Platforms based on QEMU and GPGPU-Sim

비x86 플랫폼 상에서의 CUDA 컴퓨팅을 위한 QEMU 및 GPGPU-Sim 기반 시뮬레이션 프레임워크 개발

  • 황재민 (충남대학교 컴퓨터공학과) ;
  • 최종욱 (항공우주연구원 위성비행소프트웨어팀) ;
  • 최성림 (충남대학교 컴퓨터공학과) ;
  • 남병규 (충남대학교 컴퓨터공학과)
  • Received : 2014.03.07
  • Accepted : 2014.04.15
  • Published : 2014.04.30
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Abstract

This paper proposes a CUDA simulation framework for non-x86 computing platforms based on QEMU and GPGPU-sim. Previous simulators for heterogeneous computing platforms did not support for non-x86 CPU models or CUDA computing platform. In this work, we combined the QEMU and the GPGPU-Sim to support the non-x86 CPU models and the CUDA platform, respectively. This approach provides a simulation framework for CUDA computing on non-x86 CPU models.

본 논문에서는 QEMU와 GPGPU-Sim에 기반하여 비x86 플랫폼을 위한 CUDA 시뮬레이션 프레임워크를 제안한다. 기존 CPU-GPU 이종 컴퓨팅 시뮬레이터는 x86 CPU 모델만을 지원하거나 CUDA를 지원하지 않는 한계를 가진다. 제안된 시뮬레이터는 이러한 문제를 해결하기 위해 x86을 포함하여 비x86 CPU 모델을 지원 가능한 QEMU와 CUDA를 지원하는 GPU 시뮬레이터인 GPGPU-Sim을 통합하였다. 이를 통해 비x86 기반의 CUDA 컴퓨팅 환경을 시뮬레이션할 수 있도록 하였다.

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References

  1. B.-G. Nam and H.-J Yoo, "An Embedded Stream Processor Core Based on Logarithmic Arithmetic for a Low-Power 3-D Graphics SoC", IEEE J. Solid-State Circuits, Vol. 44, No. 5, pp. 1554-1570, 2009. https://doi.org/10.1109/JSSC.2009.2016698
  2. J. Nickolls and W. J. Dally, "The GPU Computing Era", IEEE Micro, Vol. 30, No. 2, pp. 56-69, 2010. https://doi.org/10.1109/MM.2010.41
  3. J. E. Stone, D. Gohara, and G. Shi, "OpenCL: A Parallel Programming Standard for Heterogeneous Computing Systems", IEEE Computing in Science & Engineering, Vol. 12, No. 3, pp. 66-73, 2010.
  4. W. Sheng, P. Szymanski, R. Leupers, and G. Ascheid, "Software Migration for Parallel Execution on a Multicore Tablet: A Case Study", The IEEE 7th International Symposium on Embedded Multicore SoC, pp. 26-28, Sep. 2012.
  5. R. Ubal, J. Sahuquillo, S. Petit, and P. Lopez "Multi2Sim: a Simulation Framework for CPU-GPU Computing", in Proc. of the 21st International Conference on Parallel Architectures and Compilation Techniques, pp. 335-344, Sep. 2012.
  6. V. Zakharenko, T. Aamodt, and A. Moshovos, "Characterizing the performance benefits of fused CPU/GPU systems using FusionSim", IEEE in Proc. DATE, pp. 685-688, Mar. 2013.
  7. H. Wang, V. Sathish, R. Singh, M. Schulte, and N. Kim, "Workload and Power Budget Partitioning for Single-Chip Heterogeneous Processors", IEEE/ACM Int. Conf. on Parallel Architecture and Compilation Techniques (PACT), Sep. 2012.
  8. S. Raghav, C. Pinto, M. Ruggiero, A. Marongiu, D. Atienza, and L. Benini, "Full System Simulation of Many-Core Heterogeneous SoCs using GPU and QEMU Semihosting", In Proceedings of ACM Workshop on General Purpose Processing with Graphics Processing Units, pp. 101-109, Mar. 2012.
  9. M. T. Yourst, "PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator", IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), pp. 23-34, 2007.
  10. S.-T. Shen, S.-Y. Lee, and C.-H. Chen, "Full System Simulation with QEMU: an Approach to Multi-view 3D GPU Design", IEEE Int. Symp. on Circuits and Systems (ISCAS), pp. 3877-3880, May, 2010.
  11. S. Collange, M. Daumas, D. Defour, and D. Parello, "Barra: a Parallel Functional Simulator for GPGPU", IEEE/ACM International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, pp. 351-360, Aug. 2010.
  12. F. Bellard, "QEMU, a Fast and Portable Dynamic Translator", in Proceedings of USENIX Annual Technical Conference, pp. 41-46, June, 2005.
  13. A. Bakhoda, G. L. Yuan, W. W. L. Fung, H. Wong and T. M. Aamodt, "Analyzing CUDA Workloads Using a Detailed GPU Simulator", IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), pp. 163-174, Apr. 2009.