Journal of Practical Engineering Education (실천공학교육논문지)

Korean Institute for Pratical Engineering Education (한국실천공학교육학회)
권호 표지
DOI QR코드

DOI QR Code

Education equipment for FPGA-based multimedia player design

FPGA 기반의 멀티미디어 재생기 설계 교육용 장비

  • Yu, Yun Seop (Department of Electrical, Electronic and Control Engineering, Hankyong National University)
  • 유윤섭 (한경대학교 전기전자제어공학과)
  • Received : 2014.10.30
  • Accepted : 2014.11.19
  • Published : 2014.12.01
Download PDF
⟨ Previous Next ⟩

Abstract

Education equipment for field programmable gate array (FPGA) based multimedia player design is introduced. Using the education equipment, an example of hardware design for color detection and augment reality (AR) game is described, and an example of syllabus for "Digital system design using FPGA" course is introduced. Using the education equipment, students can develop the ability to design some hardware, and to train the ability for the creative capstone design through conceptual, partial-level, and detail designs. By controlling audio codec, system-on-chip (SOC) design skills combining a NIOS II soft microprocessor and digital hardware in one FPGA chip are improved. The ability to apply wireless communication and LabView to FPGA-based digital design is also increased.

FPGA를 이용해서 다양한 멀티미디어 데이터 처리가 가능한 교육장비를 소개한다. 이 장비를 이용해서 영상인식 기반의 하드웨어 설계의 한 사례를 소개하고 그 설계를 기반으로 "FPGA를 이용한 디지털시스템 설계" 교과목의 교육 가능한 사례를 소개한다. 학생들에 의해서 새롭게 설계한 하드웨어를 본 FPGA를 이용해서 하드웨어 장비에 적용시키는 능력을 배양할 수 있고, 또한 개념 설계, 부분설계, 상세설계를 통해서 FPGA 기반 하드웨어의 창의적 종합설계 능력을 키울 수 있다. 그리고 오디오 코덱을 제어하는 부분은 FPGA내에 있는 소프트 마이크로프로세서인 NIOS II를 이용해서 한 칩에 디지털 하드웨어와 마이크로컨트롤러를 결합한 SOC 설계 능력을 키울 수 있다. 또한, 무선통신, Labivew와 FPGA 설계 능력을 결합하는 적용능력도 키울 수 있다.

Keywords

References

  1. S. Brown and J. Rose, "FPGA and CPLD architectures: A tutorial," IEEE Design & Test of Computers, vol. 13, no. 2, pp. 42-57, 1996. https://doi.org/10.1109/54.500200
  2. E. Monmasson and M. N. Cirstea, "FPGA design methodology for industrial control systems-A review," IEEE Transactions on Industrial Electronics, vol. 54, no. 4, pp. 1824-1842, 2007. https://doi.org/10.1109/TIE.2007.898281
  3. M. Tomasi, M. Vanegas, F. Barranco, J. Diaz, and E. Ros, "Real-time architecture for a robust multi-scale stereo engine on FPGA," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 20, no. 12, pp. 2208-2219, 2012. https://doi.org/10.1109/TVLSI.2011.2172007
  4. A. Kinsman and N. Nicolici, "A VLSI architecture and the FPGA prototype for MPEG-2 audio/video decoding," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 19, no. 3, pp. 499-503, 2011. https://doi.org/10.1109/TVLSI.2009.2034168
  5. A. Gupta, V. K. Sehrawat, and M. Khosla, "FPGA based real time human hand gesture recognition system," Procedia Technology vol. 6, pp. 98-107, 2012. https://doi.org/10.1016/j.protcy.2012.10.013
  6. S. A. Christe, M. Vignesh, and A. Kandaswamy "An efficient FPGA implementation of MRI image filtering and tumour characterization using Xilinx system generator," International Journal of VLSI Design & Communication Systems (VLSICS), vol. 2, no. 4, pp. 95-109, 2011. https://doi.org/10.5121/vlsic.2011.2409
  7. L. R. Rabiner, "A tutorial on hidden Markov models and selected applications in speech recognition," Proceedings of the IEEE, vol. 77, no. 2, pp. 257-286, 1989. https://doi.org/10.1109/5.18626
  8. P. Anandan and R. S. Sabeenian, "Image compression techniques using curvelet, contourlet, ridgelet and wavelet transforms-A review," Biometrics and Bioinformatics, vol. 5, no. 7, pp. 267-270, 2013.
  9. Y. Shishikui, K. Iguchi, S. Sakaida, K. Kazui, and A. Nakagawa, "High-performance video codec for super hivision," Proceedings of the IEEE, vol. 101, no. 1, pp. 130-139, 2013. https://doi.org/10.1109/JPROC.2012.2205656
  10. Terasic. Altera DE2-115 development and education board [Internet]. Available: http://www.terasic.com.
  11. Terasic. 4.3" LCD touch panel package [Internet]. Available: http://www.terasic.com.
  12. SHARP. NT-335C [Internet]. Available: http://backup.ntrex.co.kr/mart7/upload/pdf/NT-335C.pdf.
  13. Texas Instrument. $PurePath^{(TM)}$ wireless 2.4 GHz RF SoC for wireless digital audio streaming CC8531 [Internet]. Available: http://www.ti.com.
  14. Texas Instrument. Second generation system-on-chip solution for 2.4 GHz IEEE 802.15.4/RF4CE/ZigBee CC2530 [Internet]. Available: http://www.ti.com.
  15. National Instrument. LabView [Internet]. Available: http://www.ni.com/labview.
  16. Altera. Introduction to the Quartus(R) II software, version 13.1, altera corp. San Jose, CA [Internet]. Available: http://www.altera.com.
  17. Altera. Nios II software developer's handbook, altera corp. San Jose, CA [Internet]. Available: http://www.altera.com.