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CMOS Linear Power Amplifier with Envelope Tracking Operation (Invited Paper)

  • Park, Byungjoon (Division of Information Technology Convergence Engineering, Pohang University of Science and Technology (POSTECH)) ;
  • Kim, Jooseung (Department of Electrical Engineering, POSTECH) ;
  • Cho, Yunsung (Division of Information Technology Convergence Engineering, Pohang University of Science and Technology (POSTECH)) ;
  • Jin, Sangsu (Department of Electrical Engineering, POSTECH) ;
  • Kang, Daehyun (Broadcom Corporation) ;
  • Kim, Bumman (Department of Electrical Engineering, POSTECH)
  • Received : 2014.01.22
  • Accepted : 2014.02.19
  • Published : 2014.03.31

Abstract

A differential-cascode CMOS power amplifier (PA) with a supply modulator for envelope tracking (ET) has been implemented by 0.18 ${\mu}m$ RF CMOS technology. The loss at the output is minimized by implementing the output transformer on a FR-4 printed circuit board (PCB). The CMOS PA utilizes the $2^{nd}$ harmonic short at the input to enhance the linearity. The measurement was done by the 10MHz bandwidth 16QAM 6.88 dB peak-to-average power ratio long-term evolution (LTE) signal at 1.85 GHz. The ET operation of the CMOS PA with the supply modulator enhances the power-added efficiency (PAE) by 2.5, to 10% over the stand-alone CMOS PA for the LTE signal. The ET PA achieves a PAE of 36.5% and an $ACLR_{E-UTRA}$ of -32.7 dBc at an average output power of 27 dBm.

Keywords

References

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