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Data Randomization Scheme for Endurance Enhancement and Interference Mitigation of Multilevel Flash Memory Devices

  • Cha, Jaewon (Department of Electrical Engineering, Yonsei University) ;
  • Kang, Sungho (Department of Electrical Engineering, Yonsei University)
  • Received : 2012.06.22
  • Accepted : 2012.08.13
  • Published : 2013.02.01

Abstract

In this letter, we propose a data randomization scheme for endurance and interference mitigation of deeply-scaled multilevel flash memory. We address the relationships between data patterns and the raw bit error rate. An on-chip pseudorandom generator composed of an address-based seed location decoder is developed and evaluated with respect to uniformity. Experiments performed with 2x-nm and 4x-nm NAND flash memory devices illustrate the effectiveness of our scheme. The results show that the error rate is reduced up to 86% compared to that of a conventional cycling scheme. Accordingly, the endurance phenomenon can be mitigated through analysis of interference that causes tech shrinkage.

Keywords

References

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