Journal of Electrical Engineering and Technology

The Korean Institute of Electrical Engineers (대한전기학회)
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Design and Evaluation of a Protection Relay for a Wind Generator Based on the Positive- and Negative-Sequence Fault Components

  • Zheng, Taiying (Dept. of Electrical Engineering and Wind energy Grid-Adaptive Technology (WeGAT) Research Centre, Chonbuk National University) ;
  • Cha, Seung-Tae (Dept. of Electrical Engineering, Technical University of Denmark) ;
  • Kim, Yeon-Hee (Dept. of Electrical Engineering and Wind energy Grid-Adaptive Technology (WeGAT) Research Centre, Chonbuk National University) ;
  • Crossley, Peter A. (School of Electrical and Electronic Engineering, University of Manchester) ;
  • Lee, Sang Ho (Korea Electrotechnology Research Institute) ;
  • Kang, Yong Cheol (Dept. of Electrical Engineering and WeGAT Research Centre, and Smart Grid Research Centre, Chonbuk National University)
  • Received : 2013.04.16
  • Accepted : 2013.06.10
  • Published : 2013.09.01
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Abstract

To avoid undesirable disconnection of healthy wind generators (WGs) or a wind power plant, a WG protection relay should discriminate among faults, so that it can operate instantaneously for WG, connected feeder or connection bus faults, it can operate after a delay for inter-tie or grid faults, and it can avoid operating for parallel WG or adjacent feeder faults. A WG protection relay based on the positive- and negative-sequence fault components is proposed in the paper. At stage 1, the proposed relay uses the magnitude of the positive-sequence component in the fault current to distinguish faults requiring non-operation response from those requiring instantaneous or delayed operation responses. At stage 2, the fault type is first determined using the relationships between the positive- and negative-sequence fault components. Then, the relay differentiates between instantaneous operation and delayed operation based on the magnitude of the positive-sequence fault component. Various fault scenarios involving changes in position and type of fault and faulted phases are used to verify the performance of the relay. This paper concludes by implementing the relay on a hardware platform based on a digital signal processor. Results indicate that the relay can successfully distinguish the need for instantaneous, delayed, or non-operation.

Keywords

References

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