참고문헌
- NVIDIA Corporation, "NVIDIA CUDA Compute Unified Device Architecture Programming Guide version 4.0," 2011.
- C. Yang, Q. Wu, T. Tang, F. Wang, and J. Xue, "Programming for scientific computing on peta-scale heterogeneous parallel systems," Journal of Central South University, vol. 20, no. 5, pp. 1189-1203, May, 2013. https://doi.org/10.1007/s11771-013-1602-z
- X. Yang, T. Tang, G. Wang, J. Jia, and X. Xu, "MPtostream: an OpenMP compiler for CPU-GPU heterogeneous parallel systems," Science China-information Sciences, vol. 55, no. 9, pp. 1961-1971, September, 2012.
- C. Yang, Q. Wu, H. Hu, Z. Shi, J. Chen, and T. Tang, "Fast weighting method for plasma PIC simulation on GPU-accelerated heterogeneous systems," Journal of Central South University, vol. 20, no. 6, pp. 1527-1535 , June, 2013. https://doi.org/10.1007/s11771-013-1644-2
- S. Gronroos, K. Nybom and J. Bjorkqvist, "Complexity analysis of software defined DVB-T2 physical layer," Analog Integrated Circuits and Signal Processing, vol. 69, no. 2-3, pp. 131-142, December, 2011. https://doi.org/10.1007/s10470-011-9724-4
- J. Kim, H. Seungheon and C. Seungwon, "Implementation of an SDR system using graphics processing unit," IEEE Communication Magazine, vol. 48, no. 3, pp. 156-162, March, 2010.
- C. Ahn, J. Kim, J. Ju, J. Choi, B. Choi and S. Choi, "Implementation of an SDR platform using GPU and its application to a 2x2 MIMO WiMAX system," Analog Integrated Circuits and Signal Processing, vol. 69, no. 2, pp. 107-117, December, 2011. https://doi.org/10.1007/s10470-011-9764-9
- C. Ahn, S. Bang, H. Kim, S. Lee, J. Kim, S. Choi, and J. Glossner, "Implementation of an SDR system using an MPI-based GPU cluster for WiMAX and LTE," Analog Integrated Circuits and Signal Processing, vol. 73, no. 2, pp. 569-582, November, 2012. https://doi.org/10.1007/s10470-012-9941-5
- Z. Yu, M. J. Meeuwsen, R. W. Apperson, O. Sattari, M. A. Lai, J. W. Webb, E. W. Work, T. Mohsenin, and B. M. Baas, "Architecture and evaluation of an asynchronous array of simple processors," Journal of Signal Processing Systems, vol. 53, no. 3, pp. 243-259, December, 2008. https://doi.org/10.1007/s11265-008-0162-1
- A. T. Tran, D. N. Truong, and B. M. Baas, "A complete real-time 802.11a baseband receiver implemented on an array of programmable processors," in Proc. of 42nd Asilomar Conference Signals, Systems and Computer, pp. 165-170, October 26-29, 2008.
- H. Lee, C. Chakrabarti, and T. Mudge, "A low-power DSP for wireless communications," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 18, no. 9, pp. 1310-1322, September, 2010. https://doi.org/10.1109/TVLSI.2009.2023547
- M. Mizani, and D. Rakhmatov, "Multi-clock pipelined design of an IEEE 802.11a physical layer transmitter," in Proc. of 20th International Parallel and Distributed Processing Symposium, pp. 21-27, April 25-29, 2006.
- J. S. Park and T. Ogunfunmi, "Efficient FPGA-Based Implementations of MIMO-OFDM Physical Layer," Circuits Systems and Signal Processing, vol. 31, no. 4, pp. 1487-1511, August, 2012. https://doi.org/10.1007/s00034-012-9411-4
- M. J. Canet, J. Valls, V. Almenar and J. Marin-Roig, "FPGA implementation of an OFDM-based WLAN receiver," Microprocessors and Microsystems, vol. 36, no. 3, pp. 232-244, May, 2012. https://doi.org/10.1016/j.micpro.2011.11.004
- T. Nylanden, J. Janhunen, O. Silven and M. Juntti, "A GPU implementation for two MIMO-OFDM detectors," in Proc. of International Conf. Embedded Computer Systems: Architectures, Modeling and Simulation, pp. 293-300, July 19-22, 2010.
- M. Wu, Y. Sun, S. Gupta and J. R. Cavallaro, "Implementation of a high throughput soft MIMO detector on GPU," Journal of Signal Processing Systems, vol. 64, no. 1, pp. 123-136, July, 2011. https://doi.org/10.1007/s11265-010-0523-4
- G. Falcao, L. Sousa and V. Silva, "Massively LDPC decoding on multicore architectures," IEEE Transactions on Parallel and Distributed Systems, vol. 22, no. 2, pp. 309-322, February, 2011. https://doi.org/10.1109/TPDS.2010.66
- H. Ji, J. Cho and W. Sung, "Memory access optimized implementation of cyclic and quasi-cyclic LDPC codes on a GPGPU," Journal of Signal Processing System, vol. 64, no. 1, pp. 149-159, July 2011. https://doi.org/10.1007/s11265-010-0547-9
- F. J. Martinez-Zaldivar, A. M. Vidal-Macia, A. Gonzalez and V. Almenar, "Tridimensional block multiword LDPC decoding on GPUs," Journal of Supercomputing, vol. 58, no. 3, pp. 314-322, December, 2011. https://doi.org/10.1007/s11227-011-0587-3
- M. Wu, Y. Sun, and J. R. Cavallaro, "Implementation of a 3GPP LTE turbo decoder accelerator on GPU," in Proc. of IEEE Workshop Signal Processing Systems, pp. 192-197, October, 2010.
- C. Lin, W. Liu, W. Yeh, L. Chang, W. Hwu, S. Chen, and P. Hsiung, "A Tiling-Scheme Viterbi Decoder in Software Defined Radio for GPUs," in Proc. of 2011 7th International Conf. Wireless Communications, Networking and Mobile Computing, pp. 1-4, September 23-25, 2011.
- R. W. Chang, "Symthesis of band-limited orthogonal signals for mulltichannel data transmission," Bell System Technical Kournal, vol. 45, pp. 1775-1796, 1966. https://doi.org/10.1002/j.1538-7305.1966.tb02435.x
- IEEE, "Std 802.11a-1999, Part 11: wireless LAN, medium access control (MAC) and physical layer (PHY) specifications: high-speed physical layer in the 5 GHz band, supplement to IEEE 802.11 Standard," 1999.
- IEEE, "IEEE standard 802.16. Air interface for fixed broadband wireless access systems," 2004.
- S. Choi, K. Kang and S. Choi, "A two-stage radix-4 Viterbi decoder for multiband OFDM UWB system," ETRI Journal, vol. 30, no. 6, pp. 850-852, December, 2008. https://doi.org/10.4218/etrij.08.0208.0196
- NVIDIA Corporation, "CUBLAS Library version 4.0," 2011.
- Texas Instruments, "TMS320C64x DSP Library Programmer's Reference," 2002.
피인용 문헌
- GPU-Accelerated Single Image Depth Estimation with Color-Filtered Aperture vol.8, pp.3, 2013, https://doi.org/10.3837/tiis.2014.03.020