Journal of the Semiconductor & Display Technology (반도체디스플레이기술학회지)

The Korean Society Of Semiconductor & Display Technology (한국반도체디스플레이기술학회)
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Process TAC Time Reduction Technology for Improving the Efficiency and Throughput of the PDP

PDP 효율 및 생산성 향상을 위한 공정단순화 기술

  • Kwon, Sang Jik (Department of Electronics Engineering, Gachon University)
  • Received : 2013.05.23
  • Accepted : 2013.06.17
  • Published : 2013.06.30
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Abstract

This paper focuses on the fundamental issues for improving the efficiency and throughput of the AC PDP (Plasma Display Panel) manufacturing. The properties of the MgO protective layer affect the PDP efficiency. Especially, the secondary electron emission efficiency was affected on the deposition rate of MgO during the evaporation. In this study, the deposition rate of 5 $\AA$/s has given the maximum efficiency value of 0.05 It is demonstrated that the impurity gases such as $H_2O$, $CO_2$, CO or $N_2$, and $O_2$ can be remained inside the PDP panel before sealing and the amount of the impurity gases decreased rapidly as the base vacuum level increased, especially near $10^{-5}$ torr. The fundamental solution in order to overcome these problems is the vacuum in-line sealing process from the MgO evaporation to the final sealing of the panel without breaking the vacuum. We have demonstrated this fundamental process technology and shown the feasibility. The firing voltage was reduced down to 285 V at the base vacuum value of $10^{-6}$ torr, whreras it was about 328 V at the base vacuum value of $10^{-3}$ torr.

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References

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