DOI QR코드

DOI QR Code

10 Gbps Transimpedance Amplifier-Receiver for Optical Interconnects

  • Sangirov, Jamshid (Photonic Computer Systems Laboratory, Department of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST)) ;
  • Ukaegbu, Ikechi Augustine (Photonic Computer Systems Laboratory, Department of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST)) ;
  • Lee, Tae-Woo (Photonic Computer Systems Laboratory, Department of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST)) ;
  • Cho, Mu Hee (Photonic Computer Systems Laboratory, Department of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST)) ;
  • Park, Hyo-Hoon (Photonic Computer Systems Laboratory, Department of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST))
  • 투고 : 2012.09.11
  • 심사 : 2012.12.24
  • 발행 : 2013.02.25

초록

A transimpedance amplifier (TIA)-optical receiver (Rx) using two intersecting active feedback system with regulated-cascode (RGC) input stage has been designed and implemented for optical interconnects. The optical TIA-Rx chip is designed in a 0.13 ${\mu}m$ CMOS technology and works up to 10 Gbps data rate. The TIA-Rx chip core occupies an area of 0.051 $mm^2$ with power consumption of 16.9 mW at 1.3 V. The measured input-referred noise of optical TIA-Rx is 20 pA/${\surd}$Hz with a 3-dB bandwidth of 6.9 GHz. The proposed TIA-Rx achieved a high gain-bandwidth product per DC power figure of merit of 408 $GHz{\Omega}/mW$.

키워드

참고문헌

  1. B. Analui and A. Hajimiri, "Bandwidth enhancement for transimpedance amplifier," IEEE Journal of Solid-Stage Circuits 39, 1263-1270 (2004). https://doi.org/10.1109/JSSC.2004.831783
  2. T. H. Ngo, T. W. Lee, and H. H. Park, "4.1 mW 50 dB$\Omega$ 10 Gbps transimpedance amplifier for optical receivers in 0.13 $\mu m$ CMOS," Microwave and Optical Technology Lett. 53, 448-451 (2011). https://doi.org/10.1002/mop.25741
  3. J. D. Jin and Sh. S. H. Hsu, "A 75-dB$\Omega$ 10-Gb/s transimpedance amplifier in 0.18-$\mu m$ CMOS technology," IEEE Photon. Technol. Lett. 20, 2177-2179 (2008). https://doi.org/10.1109/LPT.2008.2007812
  4. W.-Z. Chen, Y.-L. Cheng, and D.-Sh. Lin, "A 1.8-V 10-Gb/s fully integrated CMOS optical receiver analog front-end," IEEE Journal of Solid-State Circuits 40, 1388-1396 (2005). https://doi.org/10.1109/JSSC.2005.845970
  5. Ch.-H. Wu, Ch.-H. Lee, W.-Sh. Chen, and Sh.-I. Liu, "CMOS wideband amplifiers using multiple inductive-series peaking technique," IEEE Journal of Solid-State Circuits 40, 548-552 (2005). https://doi.org/10.1109/JSSC.2004.840979
  6. O. Momeni, H. Hashemi, and E. Afshari, "A 10-Gb/s inductorless transimpedance amplifier," IEEE Trans. on Circuits and Systems 57, 926-930 (2010). https://doi.org/10.1109/TCSII.2010.2087971
  7. L. Zhenghao, Ch. Dandan, and Y. K. Seng, "An inductorless broadband design technique for transimpedance amplifiers," in Proc. of ISIC (Suntec, Singapore, Dec. 2009), pp. 232-235.
  8. S. M. Park and H. J. Yoo, "1.25-Gb/s regulated cascode CMOS transimpedance amplifier for gigabit Ethernet applications," IEEE Journal of Solid-State Circuits 39, 112-121 (2004). https://doi.org/10.1109/JSSC.2003.820884
  9. Ch. T. Chan and O. T. Chen, "Inductor-less 10Gb/s CMOS transimpedance amplifier using source-follower regulated cascode and double three-order active feedback," in Proc. of IEEE Int. Symp. on Circuits and Systems (Island of Kos, Greece, May 2006), pp. 5487-5490.

피인용 문헌

  1. Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects vol.34, pp.12, 2013, https://doi.org/10.1088/1674-4926/34/12/125001
  2. A Power-adjustable Fully-integrated CMOS Optical Receiver for Multi-rate Applications vol.20, pp.5, 2016, https://doi.org/10.3807/JOSK.2016.20.5.623
  3. Design and analysis of a multichannel transceiver for high-speed optical interconnects vol.48, pp.1, 2016, https://doi.org/10.1007/s11082-015-0316-x
  4. Power Saving Rx Design for Optical Modules vol.24, pp.07, 2015, https://doi.org/10.1142/S0218126615500954
  5. Power saving bidirectional optical transceiver design and fabrication vol.47, pp.8, 2015, https://doi.org/10.1007/s11082-015-0198-y
  6. Optical transceiver with in-chip temperature compensation module design and fabrication vol.48, pp.10, 2016, https://doi.org/10.1007/s11082-016-0721-9