Journal of information and communication convergence engineering

The Korea Institute of Information and Commucation Engineering (한국정보통신학회)
권호 표지
DOI QR코드

DOI QR Code

The Analysis of Breakdown Voltage for the Double-gate MOSFET Using the Gaussian Doping Distribution

  • Jung, Hak-Kee (Department of Electronic Engineering, Kunsan National University)
  • Received : 2012.03.20
  • Accepted : 2012.04.20
  • Published : 2012.06.30
Download PDF
⟨ Previous Next ⟩

Abstract

This study has presented the analysis of breakdown voltage for a double-gate metal-oxide semiconductor field-effect transistor (MOSFET) based on the doping distribution of the Gaussian function. The double-gate MOSFET is a next generation transistor that shrinks the short channel effects of the nano-scaled CMOSFET. The degradation of breakdown voltage is a highly important short channel effect with threshold voltage roll-off and an increase in subthreshold swings. The analytical potential distribution derived from Poisson's equation and the Fulop's avalanche breakdown condition have been used to calculate the breakdown voltage of a double-gate MOSFET for the shape of the Gaussian doping distribution. This analytical potential model is in good agreement with the numerical model. Using this model, the breakdown voltage has been analyzed for channel length and doping concentration with parameters such as projected range and standard projected deviation of Gaussian function. As a result, since the breakdown voltage is greatly changed for the shape of the Gaussian function, the channel doping distribution of a double-gate MOSFET has to be carefully designed.

Keywords

References

  1. International Technology Roadmap for Semiconductors [Internet]. Available: http://public.itrs.net/.
  2. E. G. Ioannidis, A. Tsormpatzoglou, D. H. Tassis, C. A. Dimitriadis, G. Ghibaudo, and J. Jomaah, "Effect of localized interface charge on the threshold voltage of short-channel undoped symmetrical doublegate MOSFETs," IEEE Transactions on Electron Devices, vol. 58, no. 2, pp. 433-440, 2011. https://doi.org/10.1109/TED.2010.2093528
  3. X. X. Du, L. Sun, X. Y. Liu, and R. Q. Han, "A comparative study of double gate MOSFET with asymmetric barrier heights at source/drain and the symmetric DG-SBFET," International Workshop on Junction Technology, Kyoto, Japan, pp. 47-50, 2009.
  4. Q. Chen, B. Agrawal, and J. D. Meindl, "A comprehensive analytical subthreshold swing(S) model for double-gate MOSFETs," IEEE Transactions on Electron Devices, vol. 49, no. 6, pp. 1086-1090, 2002. https://doi.org/10.1109/TED.2002.1003757
  5. H. Mohammad, H. Abdullah, C. F. Dee, P. S. Menon, and B. Y. Majlis, "A new analytical model for lateral breakdown voltage of double-gate power MOSFETs," Proceedings of IEEE Regional Symposium on Micro and Nanoelectronics, Kota Kinabalu, Malaysia, pp. 92-95, 2011.
  6. P. K. Tiwari, S. Kumar, S. Mittal, V. Srivastava, U. Pandey, and S. Jit, "A 2D analytical model of the channel potential and threshold voltage of double-gate (DG) MOSFETs with vertical Gaussian doping profile," Proceedings of International Multimedia, Signal Processing and Communication Technologies, Aligarh, India, pp. 52-55, 2009.
  7. H. K. Jung, "Analysis of doping profile dependent threshold voltage for DGMOSFET using Gaussian function," International Journal of Maritime Information and Communication Sciences, vol. 9, no. 3, pp. 310-314, 2011.
  8. W. Fulop, "Calculation of avalanche breakdown voltages of silicon p-n junctions," Solid-State Electronics, vol. 10, no. 1, pp. 39-43, 1967. https://doi.org/10.1016/0038-1101(67)90111-6
  9. D. S. Havaldar, G. Katti, N. DasGupta, and A. DasGupta, "Subthreshold current model of FinFETs based on analytical solution of 3-D Poisson's equation," IEEE Transactions on Electron Devices, vol. 53, no. 4, pp. 737-742, 2006. https://doi.org/10.1109/TED.2006.870874

Cited by

  1. Full-Range Analytic Drain Current Model for Depletion-Mode Long-Channel Surrounding-Gate Nanowire Field-Effect Transistor vol.13, pp.4, 2013, https://doi.org/10.5573/JSTS.2013.13.4.361
  2. Analysis of Breakdown Voltages of Double Gate MOSFET Using 2D Potential Model vol.17, pp.5, 2013, https://doi.org/10.6109/jkiice.2013.17.5.1196
  3. Interface Trap Density of Gate-All-Around Silicon Nanowire Field-Effect Transistors With TiN Gate: Extraction and Compact Model vol.60, pp.8, 2013, https://doi.org/10.1109/TED.2013.2268193
  4. Effect of the Ge Mole Fraction on the Electrical Characteristics of Single and Dual Channel Vertical Strained SiGe Impact Ionization MOSFET (VESIMOS) vol.1107, pp.1662-8985, 2015, https://doi.org/10.4028/www.scientific.net/AMR.1107.496
  5. 이중게이트 MOSFET의 채널구조에 따른 항복전압 변화 vol.17, pp.3, 2012, https://doi.org/10.6109/jkiice.2013.17.3.672
  6. Gate All Around Metal Oxide Field Transistor: Surface Potential Calculation Method including Doping and Interface Trap Charge and the Effect of Interface Trap Charge on Subthreshold Slope vol.13, pp.5, 2012, https://doi.org/10.5573/jsts.2013.13.5.530