대한임베디드공학회논문지 (IEMEK Journal of Embedded Systems and Applications)

대한임베디드공학회 (Institute of Embedded Engineering of Korea)
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IEEE 802.11n WLAN을 위한 FFT 프로세서의 하드웨어 복잡도 최적화에 대한 연구

A Study on Optimization of Hardware Complexity of a FFT Processor for IEEE 802.11n WLAN

  • 투고 : 2011.01.31
  • 심사 : 2011.04.01
  • 발행 : 2011.08.31
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초록

A FFT/IFFT processor is the key component for orthogonal frequency division multiplexing (OFDM) systems based IEEE 802.11n wireless local area network (WLAN). There exists many radix algorithms according to the structure of butterfly as FFT sub-module, each has the pros and cons on hardware complexity. Here, mixed radix algorithms for 64 and 128 FFT/IFFT processors are proposed, which reduce hardware complexity by using mixture of radix-23 and radix-4 algorithms. The proposed algorithm finish calculation within 3.2${\mu}s$ in order to meet IEEE 802.11n standard requirements and it has less hardware complexity compared with conventional algorithms.

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참고문헌

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