Journal of the Korea Society of Computer and Information (한국컴퓨터정보학회논문지)

Korean Society of Computer Information (한국컴퓨터정보학회)
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Hardware Design and Implementation of a Parallel Processor for High-Performance Multimedia Processing

고성능 멀티미디어 처리용 병렬프로세서 하드웨어 설계 및 구현

  • Kim, Yong-Min (School of Electrical Engineering, University of Ulsan) ;
  • Hwang, Chul-Hee (School of Electrical Engineering, University of Ulsan) ;
  • Kim, Cheol-Hong (Department of Electronics and Computer Engineering, Chonnam National University) ;
  • Kim, Jong-Myon (School of Electrical Engineering, University of Ulsan)
  • 김용민 (울산대학교 전기공학부) ;
  • 황철희 (울산대학교 전기공학부) ;
  • 김철홍 (전남대학교 전자컴퓨터공학부) ;
  • 김종면 (울산대학교 전기공학부)
  • Received : 2010.11.04
  • Accepted : 2011.02.09
  • Published : 2011.05.31
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Abstract

As the use of mobile multimedia devices is increasing in the recent year, the needs for high-performance multimedia processors are increasing. In this regard, we propose a SIMD (Single Instruction Multiple Data) based parallel processor that supports high-performance multimedia applications with low energy consumption. The proposed parallel processor consists of 16 processing elements (PEs) and operates on a 3-stage pipelining. Experimental results indicated that the proposed parallel processor outperforms conventional parallel processors in terms of performance. In addition, our proposed parallel processor outperforms commercial high-performance TI C6416 DSP in terms of performance (1.4-31.4x better) and energy efficiency (5.9-8.1x better) with same 130nm technology and 720 clock frequency. The proposed parallel processor was developed with verilog HDL and verified with a FPGA prototype system.

최근 모바일 멀티미디어 기기들의 사용이 증가 하면서 고성능 멀티미디어 프로세서에 대한 필요성이 증가하고 있다. 본 논문에서는 낮은 소비전력으로 고성능 멀티미디어 애플리케이션을 구현할 수 있는 SIMD기반 병렬프로세서를 제안한다. 제안하는 병렬프로세서는 16개의 프로세싱 엘리먼트로 구성되어 있으며, 3단계 파이프라인 구조로 설계되었다. 모의실험 결과, 제안한 SIMD기반 병렬프로세서는 기존의 병렬프로세서보다 프로세싱 엘리먼트 당 상대 연산 처리량에서 높은 성능을 보였으며, 또한 동일한 130nm 테크놀리지와 720 클록주파수에서 상용 고성능 프로세서인 TI C6416보다 1.4~31.4배의 성능 향상 및 5.9~8.1배의 에너지 효율 향상을 보였다. 제안한 병렬프로세서를 하드웨어 설계언어인 verilog HDL을 이용하여 설계하였고, FPGA를 이용해 검증하였다.

Keywords

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