Transactions on Electrical and Electronic Materials

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Macro Modeling and Parameter Extraction of Lateral Double Diffused Metal Oxide Semiconductor Transistor

  • Kim, Sang-Yong (Department of Semiconductor System, Korea Polytechnic College IV) ;
  • Kim, Il-Soo (Department of Semiconductor System, Korea Polytechnic College IV)
  • Received : 2010.09.06
  • Accepted : 2010.12.20
  • Published : 2011.02.28
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Abstract

High voltage (HV) integrated circuits are viable alternatives to discrete circuits in a wide variety of applications. A HV device generally used in these circuits is a lateral double diffused metal oxide semiconductor (LDMOS) transistor. Attempts to model LDMOS devices are complicated by the existence of the lightly doped drain and by the extension of the poly-silicon and the gate oxide. Several physically based investigations of the bias-dependent drift resistance of HV devices have been conducted, but a complete physical model has not been reported. We propose a new technique to model HV devices using both the BSIM3 SPICE model and a bias dependent resistor model (sub-circuit macro model).

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References

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