참고문헌
- R. Gallager, "Low-Density Parity-Check Codes," IRE Trans. Info. Theory, vol. IT-8, pp. 21-28, Jan. 1962. https://doi.org/10.1109/TIT.1962.1057683
- D.J.C. MacKay and R.M. Neal, "Near Shannon limit performance of low density parity check codes," IEE Electronic Letter, vol. 32, no. 18, pp. 1645-1646, Aug. 1996. https://doi.org/10.1049/el:19961141
- T. Rhicardson and R. Urbanke, "Efficient Encoding of Low Density Parity Check Codes," IEEE Trans. Inform. Theory, vol. 47, pp. 638-656, Feb. 2001. https://doi.org/10.1109/18.910579
- C. Zhang, Z. Wang, J. Sha, L. Li and J. Lin, "Flexible LDPC Decoder Design for Multigigabit- per-Second Applications," IEEE Trans. Circuits and Systems-I, vol. 57, no. 1, pp. 116-124, Jan. 2010.
- X. Zhang and F. Cai, "Efficient Partial-Parallel Decoder Architecture for Quasi-Cyclic Nonbinary LDPC Codes," IEEE Trans. Circuits and Systems-I, vol. 58, no. 2, pp. 402-414, Feb. 2011. https://doi.org/10.1109/TCSI.2010.2071830
- 류혜진, 이종열, "DVB-S2 기반에서 다양한 부호 화 율을 지원하는 LDPC 복호기," 대한전자공학회 논문지, 제45권 SD편, 제2호, pp. 118-124, Feb., 2008.
- 박주열, 이소진, 정기석, 조성민, 하진석, 송용호, "메모리 사용을 최적화한 부분병렬화 구조의 CMMB 표준 지원 LDPC 복호기 설계," 대한전자 공학회 논문지, 제48권 SD편, 제1호, pp. 22-30, Jan., 2011.
- T. Mohsenin and B. Bass, "Trends and Challenges in LDPC Hardware Decoders," 2009 Asilomar Conference on Signals, Systems and Computers, pp. 1273-1277, Nov. 2009.
- 정수경, 박태근, "Quasi-Cyclic Low Density Parity Check 복호기의 다양한 설계관점에 대한 성능분석," 대한전자공학회 논문지, 제46권 SD편, 제11호, pp. 92-100, Nov, 2009.
- DVB-S2 Draft ETSI EN 302 307 V1.1.1 (2004- 06), ETSI
- IEEE 802.11n: Wireless LAN medium access control(MAC) and physical layer(PHY) specification: enhancements for higher throughput, IEEE Std. P802.11n, 2008.
- IEEE 802.16e, Part 16: Air interface for fixed and mobile broadband wireless access systems, IEEE std 802.16e-2005, Feb. 2006.
- IEEE 802.3an Task Force, 2006. Available: http://www.ieee802.org/3/an/index.html
- Framing structure, Channel coding and modulation for digital television terrestrial broadcasting system, R. P. China Standard Number: GB20600-2006 Std.
- R. M. Tanner, "A Recursive Approach to Low Complexity Codes," IEEE Trans. Infor. Theory, vol. IT-27, no. 5, pp 533-547, sep. 1981. https://doi.org/10.1109/TIT.1981.1056404
- M. Chiani, A. Conti, and A. Ventura, "Evaluation of low-density parity-check codes over block fading channels," 2000 IEEE Inter. Conf. on Comm., pp. 1183-1187, 2000.
- M. Fossorier, M. Mihaljevic and H. Imai, "Reduced complexity iterative decoding of low-density parity check codes based on belief propagation," IEEE Trans. Commun., vol. 47, pp. 673-680, May 1999. https://doi.org/10.1109/26.768759
- X.-Y. Shih, C.-Z. Zhan, and A.-Y.(Andy) Wu, "A 7.39mm2 76mW (1944, 972) LDPC Decoder Chip for IEEE 802.11n Applications," IEEE Asian Solid-State Circuits Conference, pp. 3-5, Nov. 2008.
- Massimo Rovini, Giuseppe Gentile, Francesco Rossi and Luca Fanucci, "A Minimum- Latency Block-Serial Architecture of a Decoder for IEEE 802.11n LDPC Codes," IFIP Int. Conf. on Very Large Scale Integration (VLSI-SoC 2007), pp. 236-241, 2007.
- K. Gunnam, G. Choi, W. Wang and M. Yeary, "Multi-rate layered decoder architecture for block LDPC codes of the IEEE 802.11n wireless standard," IEEE Intern. Symp. on Circuits and Systems(ISCAS), pp. 1645-1648, May 2007.
- W. Ji, Y. Abe, T. Ikenaga and S. Goto, "A high performance LDPC decoder for IEEE 802.11n standard," 2009 Asia and South Pacific Design Automation Conference,(ASP-DAC 2009), pp. 127-128, 2009.