Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Design of ESD Protection Circuits for High-Frequency Integrated Circuits

고주파 집적회로를 위한 ESD 보호회로 설계

  • Kim, Seok (School of Information & Communication Engineering, Sungkyunkwan University) ;
  • Kwon, Kee-Won (School of Information & Communication Engineering, Sungkyunkwan University) ;
  • Chun, Jung-Hoon (School of Information & Communication Engineering, Sungkyunkwan University)
  • 김석 (성균관대학교 정보통신공학부) ;
  • 권기원 (성균관대학교 정보통신공학부) ;
  • 전정훈 (성균관대학교 정보통신공학부)
  • Received : 2010.06.01
  • Accepted : 2010.07.20
  • Published : 2010.08.25
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Abstract

In multi-GHz RF ICs and high-speed digital interfaces, ESD protection devices introduce considerable parasitic capacitance and resistance to inputs and outputs, thereby degrading the RF performance, such as input/output matching, gain, and noise figure. In this paper, the impact of ESD protection devices on the performance of RF ICs is investigated and design methodologies to minimize this impact are discussed. With RF and ESD test results, the 'RF/ESD co-design' method is discussed and compared to the conventional RF ESD protection method which focuses on minimizing the device size.

본 논문은 수 GHz를 상회하는 동작 주파수를 갖는 RF집적회로와 고속 디지털 인터페이스를 위한 ESD 보호회로의 다양한 설계방법을 기술한다. 입/출력에 상당한 양의 기생 커패시턴스를 가지는 ESD 보호소자는 입/출력 임피던스 매칭에 영향을 주며, 이득, 잡음 등의 RF특성을 열화시킨다. 본 논문에서는 이와 같은 ESD 보호소자의 악영향에 대해 분석하고, 이를 감쇄시킬 수 있는 방안을 논한다. 또한 RF 특성과 ESD 내성 측정을 통해 RF/ESD 병합설계 방법을 기존의 RF ESD 보호소자의 설계방법과 비교, 분석한다.

Keywords

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