Journal of the Institute of Electronics Engineers of Korea CI (전자공학회논문지CI)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Parallel Computation of FDTD algorithm using CUDA

CUDA를 이용한 FDTD 알고리즘의 병렬처리

  • Lee, Ho-Young (School of Electrical and Electronics Engineering, Chung-Ang University) ;
  • Park, Jong-Hyun (School of Electrical and Electronics Engineering, Chung-Ang University) ;
  • Kim, Jun-Seong (School of Electrical and Electronics Engineering, Chung-Ang University)
  • 이호영 (중앙대학교 전자전기공학부) ;
  • 박종현 (중앙대학교 전자전기공학부) ;
  • 김준성 (중앙대학교 전자전기공학부)
  • Received : 2010.04.30
  • Accepted : 2010.07.07
  • Published : 2010.07.25
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Abstract

Modern GPUs(Graphic Processing Units) provide computing capability higher than that of the general CPUs(Central Processor Units). With supports of programmability of graphics pipeline GP-GPU(General Purpose computation on GPU) has gained much attention expanding its application area. This paper compares sequential and massively parallel implementations of FDTD(Finite Difference Time Domain) algorithm using CUDA(Compute Unified Device Architecture). Experimental results show upto 45X speedup over conventional CPU execution.

CPU를 능가하는 GPU의 연산능력 향상으로 범용 계산에 그래픽 프로세서를 사용하는 GP-GPU연구가 활발히 전개되고 있으며, 그 응용분야가 확대되고 있다. 본 논문에서는 전자기학 관련 분야에서 널리 사용되는 FDTD 알고리즘을 nVIDIA에서 제공하는 소프트웨어 플랫폼인 CUDA를 사용하여 구현한다. FDTD 알고리즘의 주요 연산과정을 병렬화하고, 그래픽 카드 내각기 다른 메모리의 사용에 따라 최적화하며, 단일 프로세서에서 FDTD 알고리즘을 실행시킨 경우와 비교하여 그 성능 향상 정도를 측정한다. 실험결과 단일 프로세서로 구현하였을 때에 비해 실행시간이 45배까지 향상됨을 확인할 수 있었다.

Keywords

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