Journal of the Korea Academia-Industrial cooperation Society (한국산학기술학회논문지)

The Korea Academia-Industrial cooperation Society (한국산학기술학회)
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A Design of Modified Euclidean Algorithm using Finite State Machine

FSM을 이용한 수정된 유클리드 알고리즘 설계

  • Kang, Sung-Jin (School of Info. Tech. Engineering, Korea University of Tech. and Educ.)
  • 강성진 (한국기술교육대학교 정보기술공학부)
  • Received : 2010.03.29
  • Accepted : 2010.06.18
  • Published : 2010.06.30
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Abstract

In this paper, an architecture for modified Euclidean(ME) algorithm is proposed, which is using finite-state machine(FSM) instead of degree computation. Since the proposed architecture does not have degree computation circuits, it is possible to reduce the hardware complexity of RS(Reed-Solomon) decoder, so that a very high-speed RS decoder can be implemented. RS(255,239) decoder with the proposed architecture is implemented using Verilog-HDL and requires about 13% fewer gate counts than conventional one.

본 논문에서는 FSM(finite-state machine)을 이용하여 차수 계산(degree computation)을 하지 않고 수정된 유클 리드 알고리즘(modified Euclidean algorithm)을 구현할 수 있는 구조를 제안한다. 제안된 구조는 차수계산이 필요없기 때문에 RS(Reed-Solomon) 복호기의 하드웨어 복잡도를 줄일 수 있고, 고속의 복호기 설계가 가능하게 된다. 제안된 구조를 이용하는 RS(255,239) 복호기를 Verilog HDL로 구현하였고, 기존의 복호기에 비해 게이트 수를 약 13%정도 줄일 수 있다.

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References

  1. S. B. Wicker, Error Control Systems for Digital Communication and Storage, Englewood Cliffs, NJ, Prentice-Hall, 1995.
  2. H. Shao, T. Truong, L. Deutsch, J. Yuen, I. Reed, "A VLSI design of a Pipeline Reed-Solomon Decoder," IEEE Trans. on Computers, Vol.c-34, No.5, pp.393-403, May 1985. https://doi.org/10.1109/TC.1985.1676579
  3. L. Song, M. Yu, M. Shaffer, "10- and 40-Gb/s Forward Error Correction Devices for Optical Communications," IEEE Journal of Soild-State Circuits, Vol.37, No.11, pp.1565-1573, Nov. 2002. https://doi.org/10.1109/JSSC.2002.803931
  4. Hanho Lee, "High-Speed VLSI Architecture for Parallel Reed-Solomon Decoder," IEEE Trans. on VLSI Systems, Vol.11, No.2, pp.288-294, April 2003. https://doi.org/10.1109/TVLSI.2003.810782
  5. S. Lee, H. Lee, J. Shin, J. Ko, "A High-Speed Pipelined Degree-Computationless Modified Euclidean Algorithm Architecture for Reed-Solomon Decoders," ISCAS, pp. 901-904, May, 2007.
  6. J. H. Baek and M. H. SunWoo, "New degree computationless modified Euclid's algorithm and architecture for Reed-Solomon decoder", IEEE Trans. Very Large Integr. (VLSI) Syst., vol. 14, no. 8, pp 915-920, Aug. 2006. https://doi.org/10.1109/TVLSI.2006.878484
  7. J. H. Baek and M. H. SunWoo, "Enhanced degree computationless modified Euclid's algorithm for Reed-Solomon decoders," Electronics Letters, vol. 43, no. 3, pp. 175-176, Feb., 2007. https://doi.org/10.1049/el:20073718
  8. 강성진, "RS(23,17) 리드-솔로몬 복호기 설계," 한국해양정보통신학회논문지, Vol.12, No.12, pp.2286-2292, Dec., 2008.