대한전자공학회논문지SD (Journal of the Institute of Electronics Engineers of Korea SD)

대한전자공학회 (The Institute of Electronics and Information Engineers)
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Short-Channel Bulk-Type MOSFET의 문턱전압 도출을 위한 해석적 모델

An Analytical Model for Deriving The Threshold Voltage of a Short-channel Bulk-type MOSFET

  • 양진석 (홍익대학교 전자전기공학부) ;
  • 오영해 (홍익대학교 전자전기공학부) ;
  • 서정하 (홍익대학교 전자전기공학부)
  • Yang, Jin-Seok (School of Electronic & Electrical Eng., Hongik Univ.) ;
  • Oh, Young-Hae (School of Electronic & Electrical Eng., Hongik Univ.) ;
  • Suh, Chung-Ha (School of Electronic & Electrical Eng., Hongik Univ.)
  • 투고 : 2010.06.11
  • 심사 : 2010.11.26
  • 발행 : 2010.12.25
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초록

본 논문에서는 단 채널 bulk-type MOSFET의 문턱전압의 표현식을 해석적으로 도출하는 모텔을 제시하였다 게이트 절연층 내에서는 2차원 Laplace 방정식을, silicon body 내 공핍층에서는 2차원 Poisson 방정식을 Fourier 계수 방법을 이용하여 풀어냈으며, 이로부터 채날 표면전위의 최소치를 도출하고 문턱 전압 표현 식을 도출하였다. 도출된 문턱전압 표현식을 모의 실험한 결과, 소자의 각종 parameter와 bias 전압에 대한 의존성을 비교적 정확히 도출할 수 있음을 확인할 수 있었다.

In this paper, a new analytical model for deriving the threshold voltage of a short-channel bulk-type MOSFET is suggested. Using the Fourier coefficient method, the Laplace equation in the oxide region and the Poisson equation in the depleted silicon region have been solved two-dimensionally. Making use of them, the minimum surface potential is derived to describe the threshold voltage. Simulation results show good agreement with the dependencies of the threshold voltage on the various device parameters and applied bias voltages.

키워드

참고문헌

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