Journal of the Korea Society of Computer and Information (한국컴퓨터정보학회논문지)

Korean Society of Computer Information (한국컴퓨터정보학회)
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Power-Delay Product Optimization of Heterogeneous Adder Using Integer Linear Programming

정수선형계획법을 이용한 이종가산기의 전력-지연시간곱 최적화

  • Received : 2010.06.17
  • Accepted : 2010.07.26
  • Published : 2010.10.31
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Abstract

In this paper, we propose a methodology in which a power-delay product of a binary adder is optimized based on the heterogeneous adder architecture. We formulate the power-delay product of the heterogeneous adder by using integer linear programming(ILP). For the use of ILP optimization, we adopt a transformation technique in which the initial non-linear expression for the power-delay product is converted into linear expression. The experimental result shows the superiority of the suggested method compared to the cases in which only conventional adder is used.

본 논문에서는 이종가산기구조에 근거한 이진가산기의 전력-지연시간곱의 최적화 방법론을 제안한다. 정수선형 계획법(Integer Linear Programming)에 의해 이종가산기의 전력-지연시간곱을 공식화하였다. 정수선형계획법의 사용을 위하여 최초의 전력-지연시간곱의 비선형수식을 선형수식으로 변환하는 기법을 채택하였다. 또한, 제안된 방법이 전력지연시간곱(Power-Delay Product)의 척도에서 기존가산기와 비교해 우월함을 실험결과를 통해 확인하였다.

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References

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