Journal of Sensor Science and Technology (센서학회지)

The Korean Sensors Society (한국센서학회)
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A low-power 10 Gbps CMOS parallel-to-serial converter

저전력 10 Gbps CMOS 병렬-직렬 변환기

  • Shim, Jae-Hoon (School of Electronics Engineering, Kyungpook National University)
  • Received : 2010.11.08
  • Accepted : 2010.11.17
  • Published : 2010.11.30
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Abstract

This paper presents a 10Gbps CMOS parallel-to-serial converter for transmission of sensor data. A low-noise clock multiplying unit(CMU) and a multiplexer with controllable data sequence are proposed. The transmitter was fabricated in 0.13 um CMOS process and the measured total output jitter was less than 0.1 UIpp(unit-interval, peak-to-peak) over 20 kHz to 80 MHz bandwidth. The jitter of the CMU output only was measured as 0.2 ps,rms. The transmitter dissipates less than 200 mW from 1.5 V/2.5 V power supplies.

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References

  1. S. Kleinfelder, SukHwan Lim, Xinqiao Liu, and A. E. Gamal, “A 10 000 frames/s CMOS digital pixel sensor”, IEEE J. Solid-State Circuits, vol. 36, no. 12, pp. 2049-2059, 2001. https://doi.org/10.1109/4.972156
  2. A. I. Krymski, N. E. Bock, N. Tu, D. V. Blerkom, and E. R. Fossum, “A high-speed, 240-frames/s, 4.1-Mpixel CMOS sensor”, IEEE Trans. Electron Devices, vol. 50, no. 1, pp. 130-135, 2003. https://doi.org/10.1109/TED.2002.806961
  3. J. Cao, M. Green, A. Momtaz, K. Vakilian, D. Chung, K.-C. Jen, M. Caresosa, X. Wang, W.-G. Tan, Y. Cai, L. Fujimori, and A. Hairapetian, “OC-192 transmitter and receiver in standard 0.18-um CMOS”, IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1768-1780, 2002. https://doi.org/10.1109/JSSC.2002.804336
  4. L. Henrickson, D. Shen, U. Nellore, A. Ellis, J. Oh, H. Wang, G. Gapriglione, A. Atesoglu, A. Yang, P. Wu, S. Quadri, and D. Crosbie, “Low-power fully integrated 10-Gb/s SONET/SDH transceiver in 0.13-um CMOS”, IEEE J. Solid-State Circuits, vol. 38, no. 10, pp. 1595-1601, 2003. https://doi.org/10.1109/JSSC.2003.817586
  5. H. S. Muthali, T. Thomas, and I. Young, “A CMOS 10-Gb/s SONET transceiver”, IEEE J. Solid-State Circuits, vol. 39, no 7, pp. 1026-1033, 2004. https://doi.org/10.1109/JSSC.2004.829935
  6. S. Byun, J. Lee, J. Shim, K. Kim, and H.-K. Yu, “A 10-Gb/s CMOS CDR and DEMUX IC with a quarter-rate linear phase detector”, IEEE J. Solid-State Circuits, vol. 41, no. 11, pp. 2566-2576, 2006. https://doi.org/10.1109/JSSC.2006.883334
  7. L. I. Andersson, B. G. R. Rudberg, P. T. Lewin, M. D. Reed, S. M. Planer, and S. L. Sundaram, “Silicon bipolar chipset for SONET/SDH 10 Gb/s fiber-optic communication links”, IEEE J. Solid-State Circuits, vol. 30, no. 3 , pp. 210-218, 1995. https://doi.org/10.1109/4.364434
  8. H. Cong, S. M. Logan, M.J. Loinaz, K. J. O'Brien, E. E. Perry, G. D. Polhemus, J. E. Scoggins, K. P. Snowdon, and M. G. Ward, “A 10-Gb/s 16:1 multiplexer and 10-GHz Clock Synthesizer in 0.25-um SiGe BiCMOS”, IEEE J. Solid-State Circuits, vol. 36, no. 12, pp. 1946-1953, 2001. https://doi.org/10.1109/4.972145
  9. B. Razavi, Design of Integrated Circuits for Optical Communications, McGraw-Hill, 2003.
  10. International Telecommunication Unit, ITU-T G.783 Recommendation: Characteristics of synchronous digital hierarchy (SDH) equipment functional blocks, 2004.

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