ETRI Journal

  • 제31권6호
  • /
  • Pages.717-724
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  • 2009
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  • 1225-6463(pISSN)
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  • 2233-7326(eISSN)
한국전자통신연구원 (Electronics and Telecommunications Research Institute)
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A 1.2 V 12 b 60 MS/s CMOS Analog Front-End for Image Signal Processing Applications

  • Jeon, Young-Deuk (Convergence Components & Materials Research Laboratory, ETRI) ;
  • Cho, Young-Kyun (Convergence Components & Materials Research Laboratory, ETRI) ;
  • Nam, Jae-Won (Convergence Components & Materials Research Laboratory, ETRI) ;
  • Lee, Seung-Chul (Convergence Components & Materials Research Laboratory, ETRI) ;
  • Kwon, Jong-Kee (Convergence Components & Materials Research Laboratory, ETRI)
  • 투고 : 2009.05.14
  • 심사 : 2009.10.09
  • 발행 : 2009.12.31
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초록

This paper describes a 1.2 V 12 b 60 MS/s CMOS analog front-end (AFE) employing low-power and flexible design techniques for image signal processing. An op-amp preset technique and programmable capacitor array scheme are used in a variable gain amplifier to reduce the power consumption with a small area of the AFE. A pipelined analog-to-digital converter with variable resolution and a clock detector provide operation flexibility with regard to resolution and speed. The AFE is fabricated in a 0.13 ${\mu}m$ CMOS process and shows a gain error of 0.68 LSB with 0.0352 dB gain steps and a differential/integral nonlinearity of 0.64/1.58 LSB. The signal-to-noise ratio of the AFE is 59.7 dB at a 60 MHz sampling frequency. The AFE occupies 1.73 $mm^2$ and dissipates 64 mW from a 1.2 V supply. Also, the performance of the proposed AFE is demonstrated by an implementation of an image signal processing platform for digital camcorders.

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참고문헌

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