The Journal of Korean Institute of Communications and Information Sciences (한국통신학회논문지)

The Korean Institute of Commucations and Information Sciences (한국통신학회)
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Channel Modeling for Multi-Level Cell Memory

멀티 레벨 셀 메모리의 채널 모델링

  • 박동혁 (숭실대학교 정보통신전자공학부 정보저장 및 통신 연구실) ;
  • 이재진 (숭실대학교 정보통신전자공학부 정보저장 및 통신 연구실)
  • Published : 2009.09.30
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Abstract

Recently, the memory is used in many electronic devices, thus, the many researchers make a study of the memory. To increase a storage capacity per memory block, the researchers study for reducing the fabrication process of memory and multi-level cell memory which is storing more than 2-bits in a cell. However, the multi-level cell memory has low bit-error rates by various noises. In this paper, we study the noise of multi-level cell memory, and we propose the channel model of multi-level cell memory.

메모리는 최근 많은 전자제품에 이용되면서 많은 연구자들이 메모리에 대한 연구를 진행하고 있다. 그중, 단위 면적당 저장용량을 증가하기 위한 많은 연구들이 진행되고 있는데, 단위 면적당 저장용량을 증가하기 위하여 메모리의 공정의 크기를 줄이는 연구 뿐 아니라, 최근에는 한 셀에 2비트 이상의 데이터를 저장 할 수 있는 멀티 레벨 셀 메모리의 연구가 진행되고 있다. 하지만, 한 셀에 멀티 비트를 저장하게 되면서 다양한 오류들로 인하여 저장된 데이터를 정확히 읽는 데 어려움이 많다. 본 논문에서는 멀티 레벨 셀 메모리의 오류의 요인을 분석하고 그에 대한 멀티 레벨 셀 메모리의 채널을 모델링 하였다.

Keywords

References

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