IEMEK Journal of Embedded Systems and Applications (대한임베디드공학회논문지)

Institute of Embedded Engineering of Korea (대한임베디드공학회)
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A Design of 24-bit Floating Point MAC Unit for Transformation of 3D Graphics

3차원 그래픽의 트랜스포메이션을 위한 24-bit 부동 소수점 MAC 연산기의 설계

  • 이정우 (서울시립대 전자전기컴퓨터공학부) ;
  • 김우진 (서울시립대 전자전기컴퓨터공학부) ;
  • 김기철 (서울시립대 전자전기컴퓨터공학부)
  • Received : 2009.01.05
  • Accepted : 2009.03.16
  • Published : 2009.03.31
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Abstract

This paper proposes a 24-bit floating point multiply and accumulate(MAC) unit that can be used in geometry transformation process in 3D graphics. The MAC unit is composed of floating point multiplier and floating point accumulator. When separate multiplier and accumulator are used, matrix calculation, used in the transformation process, can't use continuous accumulation values. In the proposed MAC unit the accumulator can get continuous input from the multiplier and the calculation time is reduced. The MAC unit uses about 4,300 gates and can be operated at 150 MHz frequency.

Keywords

References

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