Current-Voltage Characteristics of Schottky Barrier SOI nMOS and pMOS at Elevated Temperature

고온에서 Schottky Barier SOI nMOS 및 pMOS의 전류-전압 특성

  • Ka, Dae-Hyun (Department of Electronics Engineering, University of Incheon) ;
  • Cho, Won-Ju (Department of Electronics Materials Engineering, Kwangwoon University) ;
  • Yu, Chong-Gun (Department of Electronics Engineering, University of Incheon) ;
  • Park, Jong-Tae (Department of Electronics Engineering, University of Incheon)
  • Published : 2009.04.25

Abstract

In this work, Er-silicided SB-SOI nMOSFET and Pt-silicided SB-SOI pMOSFET have been fabricated to investigate the current-voltage characteristics of Schottky barrier SOI nMOS and pMOS at elevated temperature. The dominant current transport mechanism of SB nMOS and pMOS is discussed using the measurement results of the temperature dependence of drain current with gate voltages. It is observed that the drain current increases with the increase of operating temperature at low gate voltage due to the increase of thermal emission and tunneling current. But the drain current is decreased at high gate voltage due to the decrease of the drift current. It is observed that the ON/Off current ratio is decreased due to the increased tunneling current from the drain to channel region although the ON current is increased at elevated temperature. The threshold voltage variation with temperature is smaller and the subthreshold swing is larger in SB-SOI nMOS and pMOS than in SOI devices or in bulk MOSFETs.

본 연구에서는 고온에서 Schottky barrier SOI nMOS 및 pMOS의 전류-전압 특성을 분석하기 위해서 Er 실리사이드를 갖는 SB-SOI nMOSFET와 Pt 실리사이드를 갖는 SB-SOI pMOSFET를 제작하였다. 게이트 전압에 따른 SB-SOI nMOS 및 pMOS의 주된 전류 전도 메카니즘을 온도에 따른 드레인 전류 측정 결과를 이용하여 설명하였다. 낮은 게이트 전압에서는 온도에 따라 열전자 방출 및 터널링 전류가 증가하므로 드레인 전류가 증가하고 높은 게이트 전압에서는 드리프트 전류가 감소하여 드레인 전류가 감소하였다. 고온에서 ON 전류가 증가하지만 드레인으로부터 채널영역으로의 터널링 전류 증가로 OFF 전류가 더 많이 증가하게 되므로 ON/OFF 전류비는 감소함을 알 수 있었다. 그리고 SOI 소자나 bulk MOSFET 소자에 비해 SB-SOI nMOS 및 pMOS의 온도에 따른 문턱전압 변화는 작았고 subthreshold swing은 증가하였다.

Keywords

References

  1. G. Tsutsui, M. Saitoh, T. Hiramoto, "Impact of SOl thickness fluctuation on threshold voltage variation in ultra-thin body SOl MOSFETs," IEEE Trans. on Nanotech., vol.4, no.3, pp.369-373, 2005 https://doi.org/10.1109/TNANO.2005.846913
  2. A Xia, H Ru, Z. Xing, W. Yangyuan, "Scaling of lowered source/drain(LSD) and raised source/drain(RSD) ultra-thin body(UTB) SOl MOSFETs," Solid-State Electron, vol.49, pp. 479-483, 2005 https://doi.org/10.1016/j.sse.2004.11.021
  3. J. Knoch, M. Zhang, S. Nantl, and J. Appenzeller, "On the perfonnance of single-gated ultratin-body SOl Schottky-bamer MOSFETs," IEEE Trans. on Electron Devices, vol.53, no.7, pp.1669-1674, 2006 https://doi.org/10.1109/TED.2006.877262
  4. J. Knoch, M. Zhang, J. Appenzeller, and S. Nantl, "Physics of ultrathin-body silicon-on-insulator Schottky-bamer field-effect transistors," Applied Physics, A87, pp.351-357, 2007
  5. S. Xiong, T. King, and l Bokor, "A comparison of symmetric ultrathin-body double-gate devices with metal source/drain and doped source/drain," IEEE Trans. on Electron Devices, vol.52, no.8, pp.1859-1867, 2005 https://doi.org/10.1109/TED.2005.852893
  6. M. Jang, J. Oh, S. Maeng, and W. Cho, "Characteristics of Erbium-silicided n-type Schottky bamer tunnel transistors," Applied Physics letter, vol.83, no.13, pp.2611-2613, 2003 https://doi.org/10.1063/1.1614441
  7. Rinus T.P. Lee, A.E. Lim, K. Tan, T. Liow, G. Lo, G. Samudra, D. Chi, and Y. Yeo, 'N-channel FinFETs with 25-nm gate length and Schottky-bamer source and drain featuring Ytterbium silicide,' IEEE Electron Device Letters, vol.28, no.2, pp.164-167, 2007 https://doi.org/10.1109/LED.2006.889233
  8. G. Lameu, and E. Dubois, "Schottky-bamer source/drain MOSFETs on ultrathin SOl body with a tungsten metallic midgap gate," IEEE Electron Device Letters, vol.25, no.12, pp.908-803, 2004
  9. C.J. Koeneke, and W.T. Ynch, "Lightly doped Schottky MOSFET," Tech. Dig. of IEDM, pp.466-469, 1982
  10. D. Connelly, C. Fraulkner, D.E. Grupp, and J.S. Harris, "A new route zero bamer metal source/drain MOSFETs," IEEE Trans. on Nanotech., vol.3, no.3, pp.98-104, 2004 https://doi.org/10.1109/TNANO.2003.820774
  11. lM. Larson, and lP. Snyder, "Overview and status of metal SID Schottky-bamer MOSFET technology," IEEE Trans. on Electron Devices, vol.53, no.5, pp.1048-1058, 2006 https://doi.org/10.1109/TED.2006.871842
  12. B.T. Tsui, and C.P. Lu, "Current transport mechanism of Schottky-bamer and modified Schottky-bamer MOSFETs," Proc. of ESSDERC, pp.307-310, 2007
  13. M. Zhang, J. Knoch, S. Zhang, S. Feste, M. Schroter, and S. Mantl, "Threshold voltage variation in SOl Schottky-bamer MOSFETs," IEEE Trans. on Electron Devices, vol.55, no.3, pp.858-865, 2008 https://doi.org/10.1109/TED.2007.915054
  14. L.E. Calvet, RG. Wheeler, and M.A Reed, "Electron transport measurements of Schottky bamer inhomogeneities," Applied Physics Letters, vol.80, no.10, pp.1761-1763, 2002 https://doi.org/10.1063/1.1456257
  15. G. Groesenken, J.P. Colinge, HE. Maes, and J.C. Aldennan, and S. Holt, "Temperature dependence of threshold voltage in thin-film SOl MOSFET's," IEEE Electron Device Letters, vol. 11, no.8, pp.329-331, 1990 https://doi.org/10.1109/55.57923