Journal of Institute of Control, Robotics and Systems (제어로봇시스템학회논문지)

Institute of Control, Robotics and Systems (제어로봇시스템학회)
권호 표지
DOI QR코드

DOI QR Code

Implementation of Efficient Exponential Function Approximation Algorithm Using Format Converter Based on Floating Point Operation in FPGA

부동소수점 기반의 포맷 컨버터를 이용한 효율적인 지수 함수 근사화 알고리즘의 FPGA 구현

  • 김정섭 (충남대학교 메카트로닉스공학과) ;
  • 정슬 (충남대학교 메카트로닉스공학과)
  • Published : 2009.11.01
Download PDF
⟨ Previous Next ⟩

Abstract

This paper presents the FPGA implementation of efficient algorithms for approximating exponential function based on floating point format data. The Taylor-Maclaurin expansion as a conventional approximation method becomes inefficient since high order expansion is required for the large number to satisfy the approximation error. A format converter is designed to convert fixed data format to floating data format, and then the real number is separated into two fields, an integer field and an exponent field to separately perform mathematic operations. A new assembly command is designed and added to previously developed command set to refer the math table. To test the proposed algorithm, assembly program has been developed. The program is downloaded into the Altera DSP KIT W/STRATIX II EP2S180N Board. Performances of the proposed method are compared with those of the Taylor-Maclaurin expansion.

Keywords

References

  1. S. Jung and S. S. Kim, 'Hardware implementation of real-time neural network controller with a DSP and an FPGA for nonlinear system,' IEEE Trans. on Industrial Electronics, vol. 54, no. 1, pp. 265-271, 2007 https://doi.org/10.1109/TIE.2006.888791
  2. H. HU, T. Jin, X. Zhang, Z. LU, and Z. Qian, 'A floating-point coprocessor configured by a tpga in a digital platform based on fixed-point DSP for power electronics,' International Power Electronics and Motion Control Conference. 2006
  3. J-S. Kim, H.-W. Jeon, and S. Jung, 'Embedded hardware Implementation of an FPGA based nonlinear PID controller for the ROBOKER arm,' Journal of Control, Automation, and Systems Engineering, vol. 13, no. 12, pp. 1153-1159, Dec. 2007 https://doi.org/10.5302/J.ICROS.2007.13.12.1153
  4. K. Basterretxea, J. M. Tarela, Ines del Campo, and G Bosque, 'An experimental study on nonlinear function computation for neural/fuzzy hardware design,' IEEE Trans. on Neural Networks, vol.18, no.1, pp. 266-283, 2007 https://doi.org/10.1109/TNN.2006.884680
  5. L.-K. Wang and M. J. Schulte, 'Decimal floating-point square root using Newton-raphson iteration,' Proc. of the 16$^th$ International Conference on ASAP'05. 2005
  6. J.-S. Kim and S. Jung, 'Implementation of neural network hardware based on a floating point operation in an FPGA,' ICMIT, pp. 679451-6, 2007
  7. J.-S. Kim and S. Jung, 'Design of floating point processor for nonlinear functions based on FPGA,' Conference on Information and Control Systems, Korea, pp. 74-76, 2007
  8. J.-S. Kim and S. Jung, 'Implementation of the RBF neural chip with the on-line learning back-propagation,' IEEE WCCI, pp. 378-384, 2008
  9. J.-S. Kim and S. Jung, 'Hardware implementation of a neural network controller on FPGA for a humanoid robot arm,' IEEE AIM, pp. 1164-1169, 2008 https://doi.org/10.1109/AIM.2008.4601827
  10. 김정섭, 정슬, '비선형 함수 연산을 위한 FPGA 기반의 부동 소수점 프로세서의 설계,' 대한 임베디드공학논문지, 3권 4호, pp. 251-259, 2008