Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A Power Efficient Versatile Carry Skip Adder Architecture for the Multimode Mobile Modem

멀티모드 이동 통신 모뎀을 위한 전력 효율적 다기능 캐리스킵 가산기

  • Han, Tae-Hee (School of Information and Communication Engineering, Sungkyunkwan University)
  • 한태희 (성균관대학교 정보통신공학과)
  • Published : 2008.03.25
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Abstract

The multi-mode terminal modem which is capable of accommodating a variety of wireless communication standards needs versatile arithmetic units for processing a variety of word lengths and wide range of data rates. Since the target hardware is usually designed to meet the required highest performance, it is often wasteful in power consumption especially when low rate data processing cases. Thus, a speed and power adaptability of the arithmetic unit is a desirable feature for the wireless applications. In this paper, we propose a power efficient versatile adder architecture with carry skip logic as a basic building block constructed in hierarchical manner. The validity of the architecture is shown with respect to size, performance, and power efficiency in diverse operating modes.

다양한 무선 통신 표준 규격을 수용하는 멀티모드 단말기 모뎀은 가변적인 워드 길이와 광범위한 데이터율을 처리한 수 있는 다기능 산술 연산 회로를 필요로 한다. 일반적으로 이런 목표를 위한 하드웨어는 요구되는 최고 성능을 달성하도록 설계되어지므로 종종 전력 소모 측면에서 낭비적인 요소가 있으며 특히 낮은 데이터율에서 심화되는 경향이 있다. 따라서 동작 속도와 전력에 적합한 산술 연산 치로는 무선 통신 응용 분야에서 매우 필수적인 요소이다. 본 논문에서는 계층적인 캐리스킵 로직을 기본 구성 블록으로 하는 전력 효율적 다기능 가산기 구조를 제안하고 다양한 동작 모드에서의 면적, 성능, 전력 효율을 보임으로써 효과를 입증하였다.

Keywords

References

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