Efficient AMBA Based System-on-a-chip Core Test With IEEE 1500 Wrapper

IEEE 1500 래퍼를 이용한 효과적인 AMBA 기반 시스템-온-칩 코아 테스트

  • Yi, Hyun-Bean (Department of Computer Science & Engineering, Hanyang University) ;
  • Han, Ju-Hee (Department of Computer Science & Engineering, Hanyang University) ;
  • Kim, Byeong-Jin (Department of Computer Science & Engineering, Hanyang University) ;
  • Park, Sung-Ju (Department of Computer Science & Engineering, Hanyang University)
  • 이현빈 (한양대학교 컴퓨터공학과) ;
  • 한주희 (한양대학교 컴퓨터공학과) ;
  • 김병진 (한양대학교 컴퓨터공학과) ;
  • 박성주 (한양대학교 전자컴퓨터공학부)
  • Published : 2008.02.25

Abstract

This paper introduces an embedded core test wrapper for AMBA based System-on-Chip(SoC) test. The proposed test wrapper is compatible with IEEE 1500 and can be controlled by ARM Test Interface Controller(TIC). We use IEEE 1500 wrapper boundary registers as temporal registers to load test results as well as test patterns and apply a modified scan test procedure. Test time is reduced by simultaneously performing primary input insertion and primary output observation as well as scan-in and scan-out.

본 논문에서는 Advanced Microcontroller Bus Architecture(AMBA) 기반 System-on-Chip(SoC) 테스트를 위한 임베디드 코어 테스트 래퍼를 제시한다. IEEE 1500 과의 호환성을 유지하면서 ARM의 Test Interface Controller(TIC)로도 테스트가 가능한 테스트 래퍼를 설계한다. IEEE 1500 래퍼의 입출력 경계 레지스터를 테스트 패턴 입력과 테스트 결과 출력을 저장하는 임시 레지스터로 활용하고 변형된 테스트 절차를 적용함으로써 Scan In과 Scan Out 뿐만 아니라 PI 인가와 PO 관측도 병행하도록 하여 테스트 시간을 단축시킨다.

Keywords

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