Mathematical Analysis of the Parallel Packet Switch with a Sliding Window Scheme

  • Liu, Chia-Lung (Computer Science Institute of the National Chung-Hsing University, Information & Communications Research Lab., Industrial Technology Research Institute) ;
  • Wu, Chin-Chi (Computer Science Institute of the National Chung-Hsing University and Nan Kai Institute of Technology) ;
  • Lin, Woei (Computer Science Institute of the National Chung-Hsing University)
  • Published : 2007.09.30

Abstract

This work analyzes the performance of the parallel packet switch (PPS) with a sliding window (SW) method. The PPS involves numerous packet switches that operate independently and in parallel. The conventional PPS dispatch algorithm adopts a round robin (RR) method. The class of PPS is characterized by deployment of parallel low-speed switches whose all memory buffers run more slowly than the external line rate. In this work, a novel SW packet switching method for PPS, called SW-PPS, is proposed. The SW-PPS employs memory space more effectively than the existing PPS using RR algorithm. Under identical Bernoulli and bursty data traffic, the SW-PPS provided significantly improved performance when compared to PPS with RR method. Moreover, this investigation presents a novel mathematical analytical model to evaluate the performance of the PPS using RR and SW method. Under various operating conditions, our proposed model and analysis successfully exhibit these performance characteristics including throughput, cell delay, and cell drop rate.

Keywords

References

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