Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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An Efficient Motion Estimation Method which Supports Variable Block Sizes and Multi-frames for H.264 Video Compression

H.264 동영상 압축에서의 가변 블록과 다중 프레임을 지원하는 효율적인 움직임 추정 방법

  • Yoon, Mi-Sun (Electronic Engineering and Computer Science, Hanyang University) ;
  • Chang, Seung-Ho (Electronic Engineering and Computer Science, Hanyang University) ;
  • Moon, Dong-Sun (Electronic Engineering and Computer Science, Hanyang University) ;
  • Shin, Hyun-Chul (Electronic Engineering and Computer Science, Hanyang University)
  • 윤미선 (한양대학교 전자전기제어계측학과) ;
  • 장승호 (한양대학교 전자전기제어계측학과) ;
  • 문동선 (한양대학교 전자전기제어계측학과) ;
  • 신현철 (한양대학교 전자전기제어계측학과)
  • Published : 2007.05.25
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Abstract

As multimedia portable devices become popular, the amount of computation for processing data including video compression has significantly increased. Various researches for low power consumption of the mobile devices and real time processing have been reported. Motion Estimation is responsible for 67% of H.264 encoder complexity. In this research, a new circuit is designed for motion estimation. The new circuit uses motion prediction based on approximate SAD, Alternative Row Scan (ARS), DAU, and FDVS algorithms. Our new method can reduce the amount of computation by 75% when compared to multi-frame motion estimation suggested in JM8.2. Furthermore, optimal number and size of reference frame blocks are determined to reduce computation without affecting the PSNR. The proposed Motion Estimation method has been verified by using the hardware and software Co-Simulation with iPROVE. It can process 30 CIF frames/sec at 50MHz.

휴대용 단말기에서의 멀티미디어 정보의 이용이 일반화 되면서 동영상 압축 등의 데이터 처리를 위한 연산량이 크게 증가하고 있다. 특히, 휴대용 단말기에서의 소모 전력 감소와 실시간 처리를 위한 다양한 연구가 진행되고 있다. 본 연구에서는 H.264 인코더에서 67% 이상의 많은 연산량을 차지하는 움직임 추정기를 새로운 구조로 설계하였다. 근사적인 SAD를 사용하여 움직임을 예측하고 Alternative Row Scan (ARS) 방법을 개발하였으며, DAU, FDVS 알고리즘을 사용하여, JM8.2에 제시된 다중 프레임 움직임 추정보다 연산량을 평균적으로 75%이상 감소시켰다. 또한, 다중 프레임 움직임 추정에서의 적절한 참조 프레임 수와 참조 프레임 블록의 크기를 결정하여 연산량을 감소시키면서도 화질 열화가 거의 없도록 하였다. iPROVE 검증툴을 사용하여 하드웨어/소프트웨어 Co-Simulation을 수행하여 제안한 움직임 추정기가 정상 동작함을 확인하였으며, 50MHz에서 30 CIF frames/sec가 처리됨을 확인하였다.

Keywords

References

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