International Journal of Quality Innovation

Korean Society for Quality Management (한국품질경영학회)
권호 표지

The Neural-Network Approach to Recognize Defect Pattern in LED Manufacturing

  • Chen, Wen-Chin (Graduate Institute of Management of Technology Chung-Hua University) ;
  • Tsai, Chih-Hung (Department of Industrial Engineering and Management Ta-Hwa Institute of Technology) ;
  • Hsu, Shou-Wen (Graduate Institute of Management of Technology Chung-Hua University)
  • Published : 2006.12.31
Download PDF
⟨ Previous Next ⟩

Abstract

This paper presents neural network-based recognition system for automatic light emitting diode (LED) inspection. The back-propagation neural network (BPNN) is proposed and tested. The current-voltage (I-V) characteristic data of LED from the inspection process is used for the network training and testing. This study selects 300 random samples as network training and employs 100 samples as network testing. The experimental results show that if the classification work is done well, the accuracy of recognition is 100%, and the testing speed of the proposed recognition system is almost one half faster than the traditional inspection system does. The proposed neural-network approach is successfully demonstrated by real data sets and can be effectively developed as a recognition system for a practical application purpose.

Keywords

References

  1. Bhatikar, S. R. and Mahajan, R. L.(2002). Artificial neural-network-based diagnosis of CVD barrel reactor. IEEE Transactions on Semiconductor Manufacturing, Vol. 15, No.1, pp. 71-78 https://doi.org/10.1109/66.983446
  2. Chen, F. L. and Liu, S. F.(2000). A neural-network approach to recognize defect spatial pattern in semiconductor fabrication. IEEE Transactions on Semiconductor Manufacturing, Vol. 13, No.3, pp. 366-373 https://doi.org/10.1109/66.857947
  3. Chen, F. L., Liu, S. F., Doong, Y. Y. and Young, K. L.(2003). LOGlC product yield analysis by Wafer Bin Map pattern recognition supervised neural network. IEEE International Symposium on Semiconductor Manufacturing, No.1, pp. 501-504
  4. Chen, W. C., Chen, C. T., Ho, T. H., Chen, J. H. and Sheu, L. J.(2005). Use of neural network in pattern recognition of semiconductor etching process. The Proceedings of the 11th International Conference on Industrial Engineering and Engineering Management, No. 1, pp. 719-725
  5. Cheng, C. S. and Tseng, C. A.(1995). Neural network in detecting the change of process mean value and variance. Journal of the Chinese Institute of Industrial Engineers, Vol. 12 No.3, pp. 215-223
  6. Fogel, D. B.(1991). An information criterion for optimal neural network selection. IEEE Transactions on Neural Networks, Vol. 2, No.5, pp. 490-497 https://doi.org/10.1109/72.134286
  7. Hush, D. R. and Home, B. G.(1993). Progress in supervised neural networks. IEEE Signal Processing Magazine, Vol. 10, No.1, pp. 8-39
  8. Lee, J. H., You, S. J. and Park, S. C.(2001). A new intelligent SOFM-based sampling plan for advanced process control. Expert Systems with Applications, No. 20, pp. 133-151 https://doi.org/10.1016/S0957-4174(00)00054-3
  9. Mehrotra, K., Mohan, C. K., et Ranka and Sanjay, R.(2000). Elements of artificial neural networks. MIT Press: Cambridge, Massachusetts
  10. Murata, N., Yoshizawa, S. and Amari, S.(1994). Network information criterion-determining the number of hidden units for an artificial neural network model. IEEE Transactions on Neural Networks, Vol. 5, No.6, pp. 865-872 https://doi.org/10.1109/72.329683
  11. Obaidat, M. S., Khalid, H. and Sadoun, B.(1998). Ultrasonic transducer characterization by neural networks. Journal of Information Sciences, No. 107, pp. 195-215
  12. Onoda, T.(1995). Neural network information criterion for optimal number of hidden units. Proceedings of the IEEE International Conference on Neural Networks, No.1, pp. 270-280
  13. Palma, F. Di., Nicolao, G. De., Miraglia, G., Pasquinetti, E. and Piccinini, F.(2005). Unsupervised spatial pattern classification of electrical-wafer-sorting maps in semiconductor manufacturing. Pattern Recognition Letters, No. 26, pp. 1857-1865
  14. Sharma, V., Jha, R. and Naresh, R.(2005). An augmented Lagrange programming optimization neural network for short-term hydroelectric generation scheduling. Engineering Optimization, Vol. 37, No.5, pp. 479-497 https://doi.org/10.1080/03052150500068170
  15. Su, C. T., Yang, T. and Ke, C. M.(2002). A neural-network approach for semiconductor wafer post-sawing inspection. IEEE Transactions on Semiconductor Manufacturing, Vol. 15, No.2, pp. 260-266 https://doi.org/10.1109/66.999602
  16. Zoroofi, R. A., Taketani, H., Tamura, S., Sato, Y. and Sekiya, K.(2001). Automated inspection of lC wafer contamination. Pattern Recognition, No. 34, pp. 1307-1317