Low Voltage Program/Erase Characteristics of Si Nanocrystal Memory with Damascene Gate FinFET on Bulk Si Wafer

  • Choe, Jeong-Dong (Device Research Team, R&D Center, Samsung Electronics Co.) ;
  • Yeo, Kyoung-Hwan (Device Research Team, R&D Center, Samsung Electronics Co.) ;
  • Ahn, Young-Joon (Device Research Team, R&D Center, Samsung Electronics Co.) ;
  • Lee, Jong-Jin (Device Research Team, R&D Center, Samsung Electronics Co.) ;
  • Lee, Se-Hoon (Device Research Team, R&D Center, Samsung Electronics Co.) ;
  • Choi, Byung-Yong (Device Research Team, R&D Center, Samsung Electronics Co.) ;
  • Sung, Suk-Kang (Device Research Team, R&D Center, Samsung Electronics Co.) ;
  • Cho, Eun-Suk (Device Research Team, R&D Center, Samsung Electronics Co.) ;
  • Lee, Choong-Ho (Device Research Team, R&D Center, Samsung Electronics Co.) ;
  • Kim, Dong-Won (Device Research Team, R&D Center, Samsung Electronics Co.) ;
  • Chung, Il-Sub (School of Information and Communication Engineering, Sungkyunkwan University) ;
  • Park, Dong-Gun (Device Research Team, R&D Center, Samsung Electronics Co.) ;
  • Ryu, Byung-Il (Device Research Team, R&D Center, Samsung Electronics Co.)
  • Published : 2006.06.30

Abstract

We propose a damascene gate FinFET with Si nanocrystals implemented on bulk silicon wafer for low voltage flash memory device. The use of optimized SRON (Silicon-Rich Oxynitride) process allows a high degree of control of the Si excess in the oxide. The FinFET with Si nanocrystals shows high program/erase (P/E) speed, large $V_{TH}$ shifts over 2.5V at 12V/$10{\mu}s$ for program and -12V/1ms for erase, good retention time, and acceptable endurance characteristics. Si nanocrystal memory with damascene gate FinFET is a solution of gate stack and voltage scaling for future generations of flash memory device. Index Terms-FinFET, Si-nanocrystal, SRON(Si-Rich Oxynitride), flash memory device.

Keywords

References

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