SRAM 이중-포트를 위한 내장된 메모리 BIST IP 자동생성 시스템 개발

The Development on Embedded Memory BIST IP Automatic Generation System for the Dual-Port of SRAM

  • 심은성 (숭실대학교 컴퓨터학과) ;
  • 이정민 (숭실대학교 컴퓨터학과) ;
  • 이찬영 (숭실대학교 컴퓨터학과) ;
  • 장훈 (숭실대학교 컴퓨터학과)
  • 발행 : 2005.02.01

초록

본 논문에서는 내장된 메모리의 테스트를 편리하게 하기 위하여 간단한 사용자 설정에 의해 자동으로 BIST IP를 생성해 내는 범용 CAD 툴을 개발하였다. 기존의 툴들은 널리 사용되고 있는 알고리즘에 국한되어 있어 메모리의 모델이 변하게 되면 다시 메모리 모델에 따라 BIST IP를 설계해야 하는 번거로움이 있었다. 하지만 본 논문에서는 사용자가 원하는 메모리 모델에 따라 알고리즘을 적용해 자동으로 BIST IP를 생성해 주는 툴을 개발하였다. 내장된 메모리로는 리프레쉬가 필요 없는 다중-포트 비동기식 SRAM이 가장 많이 사용되며, 본 연구에서는 이중-포트 SRAM에 대하여 연구 하였다.

In this paper, we develop the common CAD tool that creates the automatically BIST IP by user settings for the convenient test of embedded memory. Previous tools have defect that when memory model is changed, BIST IP must re-designed depending on memory model because existing tools is limited the widely used algorithms. We develop the tool that is created automatic BIST IP. It applies the algorithm according to the memory model which user requests We usually use the multi-port asynchronous SRAM needless to refresh as the embedded memory. However, This work researches on the dual-port SRAM.

키워드

참고문헌

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