산업공학 (IE interfaces)

  • 제18권1호
  • /
  • Pages.22-34
  • /
  • 2005
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  • 1225-0996(pISSN)
  • /
  • 2234-6465(eISSN)
대한산업공학회 (Korean Institute of Industrial Engineers)
권호 표지

주문형 반도체 웨이퍼 공정분석을 위한 시뮬레이션 연구

A Simulation Study for Analyzing an on-Demand Semiconductor Wafer Process

  • 김기영 (동서대학교 국제관계학부국제물류) ;
  • 이정호 (부산대학교 산업공학과) ;
  • 강창호 (부산대학교 산업공학과) ;
  • 김갑환 (부산대학교 산업공학과)
  • Kim, Ki-Young (Logistics Program of International Relations Division, Dongseo University) ;
  • Lee, Jung-Ho (Department of Industrial Engineering, Pusan National University) ;
  • Kang, Chang-Ho (Department of Industrial Engineering, Pusan National University) ;
  • Kim, Kap-Hwan (Department of Industrial Engineering, Pusan National University)
  • 투고 : 2003.10.31
  • 심사 : 2005.01.20
  • 발행 : 2005.03.31
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초록

This paper introduces a simulation model which is based on the process analysis of a semiconductor company. The objective of the simulation modelis not only to estimate the overall performancesof the company but also to evaluate the performances of various operation rules for shop floor control. First, in order to develop the simulation model, a time study is performed for each process after analyzing the processes for the company. Second, by using ARENA, a simulation model is constructed based on the process analysis and the time study. After the simulation model is tested and run, its results are discussed.

키워드

참고문헌

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