Multi-Level을 사용한 PDP 구동회로에서 Timing 변화에 따른 특성 변화에 관한 연구

A Study on Performance Characteristics of Multi-level PDP Driver Circuit in Accordance of Signal Timing Variation

  • 발행 : 2005.12.01

초록

제안된 Multi-level PDP sustain Driver는 기존 L. Webber에 의해 제안된 방식에 비해 낮은 전압 rating을 갖는 소자를 사용하며 sustain 전압파형의 rising/falling 구간이 각각 2번의 공진에 의해 이루어진다. 본 논문에서는 rising time을 구성하는 3단계$(T_{r1},\;T_{i1},\;T_{r2})$의 변화에 따라 PDP의 방전 특성에 미치는 영향을 비교하고, 기존 LG전자의 상용화 제품인 42V6와 특성을 비교한다. 실험결과는 3단계의 rising time 중에 $T_{i1}$의 변화에 따른 특성 변화가 가장 크며, $T_{r2}$의 변화에 의한 영향도 있으며, $T_{r1}$의 변화에 따른 특성 변화는 거의 없다. 제안된 PDP driver는 $T_{r1}$이 60ns, $T_{i1}$이 120ns, $T_{r2}$가 350ns 인 경우, Full white display pattern에서 기존제품에 비해 휘도 $14.6\%$증가, 소비전력 $5.9\%$감소, panel 효율 $24.2\%$ 증가, module 효율 $21.2\%$증가 등 특성을 얻을 수 있었다. 실제 PDP module 응용에 적합할 것으로 기대된다.

The proposed Multi-level PDP sustain Driver is composed of the semiconductor devices with low voltage rating compared to those used in the prior circuit proposed by L. Wether, and it has two resonant periods during the charging (rising period) and discharging (falling period) the PDP in the sustaining voltage waveforms. In accordance with the change of timing phase$(T_{r1},\;T_{i1},\;T_{r2})$, the performance characteristics of a commercial PDP module has been carried out and compared the characteristic with the 42V6, made of LG Electronics co., Experimental results show that the performance characteristics of PDP module are greatly influenced by the variation of $T_{i1}\;and\;T_{r2}$. The variation of $T_{r1}$ do not influence much on the performances of PDP. With the conditions that $T_{r1}=60ns,\;T_{i1}=120ns,\;and\;T_{r2}=350ns$, we could get the performances listed as the luminance is increased $14.6\%$, the power consumptions is decreased $5.9\%$, the panel efficiency is increased $24.2\%$, module efficiency is increased $21.2\%$, compared to those shown in the commercial PDP module (42V6). Therefore, the proposed multi-level PDP sustain driver expected to be suitable to actual PDP module application.

키워드

참고문헌

  1. Chung-Wook Roh, Hye-Jeong Kim, Sang-Hoon Lee, and Myung-joong Youn, 'Multi-Level voltage wave-shaping display driver for AC plasma display panel application', IEEE Journal of Solid State Circuits, Vol.38, No.6, June 2003
  2. Chung-Wook Roh, 'Novel Plasma Display Driver with Low Voltage/Current Stresses', IEEE Transactions on Consumer Electronics, Vol. 49, No.4, pp.1360-1366, November 2003
  3. L.F. Webber, 'Plasma Display Device Challenges,'Asia Display '98 Digest, pp.15-271
  4. J. Castellano, 'Market Trends for Display in Consumer Television', 2000 SID Symposium, pp. 407-409
  5. T. Shinoda, et.al. 'Development of Technologies for Large-Area Color ac Plasma Displays,' 1993 SID Int. Symposium, Seattle, pp.160-161
  6. M. Ishii, et al, 'Reduction of Data Pulse Voltage to 20V by Using Address-While-Display Scheme for ACPDPs,' 1999 SID Int. Symposium, pp.162-165