Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Efficient Interconnect Test Patterns and BIST Implementation for Crosstalk and Static Faults

Crosstalk과 정적 고장을 고려한 효과적인 연결선 테스트 알고리즘 및 BIST 구현

  • Min Pyoungwo (Department of Computer Science ' Engineering, Hanyang University) ;
  • Yi Hyunbean (Department of Computer Science ' Engineering, Hanyang University) ;
  • Song Jaehoon (Department of Computer Science ' Engineering, Hanyang University) ;
  • Park Sungju (Department of Electronical Engineering Computer Science, Hanyang University)
  • 민병우 (한양대학교 컴퓨터공학과) ;
  • 이현빈 (한양대학교 컴퓨터공학과) ;
  • 송재훈 (한양대학교 컴퓨터공학과) ;
  • 박성주 (한양대학교 전자컴퓨터공학부)
  • Published : 2005.07.01
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Abstract

This paper presents effective test patterns and their BIST implementations for SoC and Board interconnects. Initially '6n'algorithm, where 'n' is the total number of interconnect nets, is introduced to completely detect and diagnose both static and crosstalk faults. Then, more economic 4n+1 algorithm is described to perfectly capture the crosstalk faults for the interconnect nets separated within a certain distance. It will be shown that both algorithms can be easily implemented as interconnect BIST hardwares with small area penalty than conventional LFSR.

본 논문은 보드 또는 SoC 상에서 코아와 코아 사이의 연결선 고장 점검을 위한 효과적인 테스트 패턴 알고리즘과 테스트 패턴 생성기를 소개한다. 연결선 고장 모델 분석을 통해 crosstalk과 정적인 고장을 100$\%$ 점검할 수 있는 6n 패턴 알고리즘을 소개한다 보다 적은 4n+1 개의 패턴으로 100\$\%$에 가까운 고장 점검율을 얻으면서 crosstalk 뿐 아니라 정적고장의 검출 및 진단도 가능한 알고리즘을 제안하고, 효과적인 BIST구현 기술에 대하여 소개한다.

Keywords

References

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